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JPH06152467A Expired / Lapsed JP ⏱️ 0.0 years remaining

Wireless communication device

Assignee: NEC Corp
•
Filing: 1992-11-06
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Granted: —
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Expires: 2012-11-06
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Abstract

Abstract Translated from Japanese (57)【要約】 【目的】 π/4シフトQPSK方式であるTDMA− TDD通信方式の無線通信装機において、受信時に、送 信波あるいは受信IF周波数と同じ周波数をもつ送信変 調波を、受信特性の劣化がなくなるまで十分に減衰させ る。 【構成】 ローカル発振回路14は、直交変調回路13 に供給される搬送波の所要の周波数のN(Nは2以上の 整数)倍の発振周波数を有するローカル発振信号を発生 する。分周回路31は、直交変調回路13とローカル発 振回路14との間に挿入され、ローカル発振信号の発振 周波数を1/Nに分周する。分周回路31で分周した信 号が直交変調回路13に供給される。制御回路32は、 送信時に分周回路31を動作状態にし、受信時には分周 回路31の動作を停止させるように制御する。 (57) [Abstract] [Purpose] π / 4 shift QPSK system TDMA- In the TDD communication type wireless communication device, at the time of reception, the transmission wave or the transmission modulation wave having the same frequency as the reception IF frequency is sufficiently attenuated until the deterioration of the reception characteristic disappears. [Configuration] The local oscillator circuit 14 is composed of a quadrature modulation circuit 13 To generate a local oscillation signal having an oscillation frequency N (N is an integer of 2 or more) times the required frequency of the carrier wave supplied to the. The frequency dividing circuit 31 is inserted between the quadrature modulation circuit 13 and the local oscillation circuit 14 and divides the oscillation frequency of the local oscillation signal into 1 / N. The signal divided by the frequency dividing circuit 31 is supplied to the quadrature modulation circuit 13. The control circuit 32 is The frequency division circuit 31 is activated during transmission, and the operation of the frequency division circuit 31 is stopped during reception.

Inventors

  • 👤 Yutaka Sasaki
  • 👤 裕 佐々木

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-09 08:46
CPC Classifications
H; H04; H04B; H04B1/00; H04B1/38; H04B1/40; H04B1/54; H04B1/56

Claims Analysis

Total Claims: 0
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References Cited (Backward Citations)

JPH04257126A Cited

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