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Semiconductor device and manufacturing method thereof

Assignee: Semiconductor Energy Laboratory Co Ltd
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Filing: 1992-06-26
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Granted: —
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Expires: 2012-06-26
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Abstract

Abstract Translated from Japanese (57)【要約】 【目的】 いわゆるMNOSもしくはMONOS型半導 体装置において、集積度を高め、かつ、作製歩留りの向 上を目的とする。 【構成】 半導体基板上に、凸状の部分を設け,その側 面に、窒化珪素膜を形成して、この被膜を覆って,ゲイ ト電極を設けた構造を有するMNOSもしくはMONO S型半導体装置。特に、このような半導体装置を多数形 成して、各半導体装置のその凸状の部分の頂部は、不純 物領域として,ここにコンタクトを形成して、ゲイト配 線と直行する配線を設けた不揮発性のMOSメモリー装 置。 (57) [Abstract] [Purpose] In a so-called MNOS or MONOS type semiconductor device, an object is to increase the degree of integration and improve the manufacturing yield. A MNOS or MONOS having a structure in which a convex portion is provided on a semiconductor substrate, a silicon nitride film is formed on a side surface of the convex portion, a gate electrode is provided so as to cover the film. S-type semiconductor device. In particular, a large number of such semiconductor devices are formed, and the top of the convex portion of each semiconductor device serves as an impurity region, and a contact is formed here to provide a wiring that is orthogonal to the gate wiring. MOS memory device.

Inventors

  • 👤 Shunpei Yamazaki
  • 👤 舜平 山崎
  • 👤 Yasuhiko Takemura
  • 👤 保彦 竹村

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-31 22:41
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/68; H10D30/689; H10B; H10B41/00; H10B41/30

Claims Analysis

Total Claims: 0
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References Cited (Backward Citations)

JPS61256673A Cited
JPS62269363A Cited
JPH02309680A Cited

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