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Semiconductor device

Assignee: Toshiba Corp
•
Filing: 1992-05-29
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Granted: —
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Expires: 2012-05-29
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Abstract

Abstract Translated from Japanese (57)【要約】 【目的】 ショットキゲート型電界効果トランジスタ用 のゲート電極の耐EM性に優れた構造を提供する。 【構成】 少なくとも、半導体基板または半導体薄層表 面に対しショットキ接触をなす電極を具備する半導体装 置において、該ショットキ接触電極金属が、前記半導体 基板または半導体薄層に接する第一のAl層と、Niか らなる中間層と、第二のAl層とを順次積層してなる積 層構造を有することを特徴とする半導体装置。 (57) [Summary] [Object] To provide a structure having excellent EM resistance of a gate electrode for a Schottky gate type field effect transistor. In a semiconductor device having at least an electrode in Schottky contact with a surface of a semiconductor substrate or a semiconductor thin layer, the Schottky contact electrode metal has a first Al layer in contact with the semiconductor substrate or the semiconductor thin layer and Ni. A semiconductor device having a laminated structure in which an intermediate layer made of and a second Al layer are sequentially laminated.

Inventors

  • 👤 Sachiko Fujie
  • 👤 幸子 藤江

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-09 20:11
CPC Classifications
B; B23; B23Q; B23Q7/00; B23Q7/14; B23Q7/1426; B23Q7/1478; B23Q7/1489

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