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JPH0470933A Expired / Lapsed JP ⏱️ 0.0 years remaining

Microprocessor

Assignee: Mitsubishi Electric Corp
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Filing: 1990-07-04
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Granted: —
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Expires: 2010-07-04
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Abstract

Abstract PURPOSE:To easily carry out a test of an entire chip with no connection required to a tester by providing a data compression device along the output terminal of an input/output interface circuit to compress the data outputted to the output terminal. CONSTITUTION:In a self-test/scan mode, a data register 18 or a serial input/ output register contained in a serial input/output interface 17 is switched to a signature register 19 which functions as a pseudo random number generator among those registers connected to a data bus 24. When an instruction is executed for transfer of data from those preceding registers to another, the register 19 produces a pseudo random number and at the same time is feedback shift registers LFSR 39, 40 and 41 provided along the output terminals 31, 33 and 35 are actuated. Then the output data are compressed and therefore the test result is decided. Thus the tests including the means 17 are attained. As a result, the test of an entire chip including a self-test of an interface circuit to the outside can be facilitated.

Inventors

  • 👤 Osamu Kitada
  • 👤 北田 修
  • 👤 Yukihiko Shimazu
  • 👤 之彦 島津
  • 👤 Tooru Kengaku
  • 👤 見学 徹
  • 👤 Hisako Mizuoka
  • 👤 水岡 久子

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-08 15:37
CPC Classifications
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