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JPH0446480A Expired / Lapsed JP ⏱️ 0.0 years remaining

Time base error correction device

Assignee: Victor Company of Japan Ltd
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Filing: 1990-06-13
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Granted: —
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Expires: 2010-06-13
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Abstract

Abstract PURPOSE:To minimize velocity error especially at the center of a screen and to increase the improvement effect of time base error correction on visual sense by shifting timing for a period corresponding to 1/2H which is the refer ence of a writing clock by an APC circuit with simple construction using only an 1H delay circuit and an addition circuit. CONSTITUTION:An input video signal is added with a video signal delayed for 1H by an 1H delay circuit 20 in an adder 21, further, the level is halved by a dividing circuit 22. The output of a comb line filter 19 becomes the addi tion average between the input signal at present and the input before 1H so that the synchronizing signal which is the reference of an APC circuit 23 becomes the average value before 1H. On the other hand, since the video signal inputted to an A/D converter 1 is delayed by an 1H delay circuit 24, it is the signal before 1H. Therefore, the centroid of time is aparently shifted in the direction of a horizontal scanning section by 1/2.

Inventors

  • 👤 Hiroshi Yamada
  • 👤 浩 山田

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-28 15:28
CPC Classifications
—

Claims Analysis

Total Claims: 0
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References Cited (Backward Citations)

JPH02155382A Cited

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