Insulated-gate field-effect transistor and manufacture thereof

Abstract

Abstract PURPOSE:To raise conductivity, suppress increase of resistance of an offset layer on the source side due to a reverse bias to be applied to the source side and also form a circuit to drive a liquid crystal display of a high drive voltage by enhancing impurity concentration of the offset layer on the source side. CONSTITUTION:An oxide film 2 is formed on the surface of a P type substrate 1 and a silicon nitride film 3 is formed thereon, followed by the patterning. Thereafter, phosphorous which is impurity for formation of offset layer is implanted with the silicon nitride layer 3 and a first photoresist layer 4 used as the mask to form a first N type layer 5. Next, after the first photoresist layer 4 is removed, phosphorus is implanted again with a second photoresist layer 6 used as the mask to form a second N type layer 7. Next, after the second photoresist layer 6 and a part of the oxide film 2 where there is no silicon nitride layer 3 are removed, treatment in the wet oxygen atmosphere is carried out to form a field oxide film 8. Next, a gate oxide film 11 is formed by the oxidation process, a gate polysilicon 12 is formed thereon, phosphorus and boron are implanted respectively to the predetermined regions and then annealing is conducted to form a drain diffused layer 13, a source diffused layer 14 and a diffused layer 15 for substrate contact.

Inventors

• 👤 Hirohisa Kitaguchi
• 👤 北口　裕久
• 👤 Masahide Kayao
• 👤 柏尾　真秀

Bibliographic Details