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JPH04192527A Expired / Lapsed JP ⏱️ 0.0 years remaining

Semiconductor device

Assignee: Toshiba Corp
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Filing: 1990-11-27
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Granted: —
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Expires: 2010-11-27
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Abstract

Abstract PURPOSE:To improve the adhesion between wirings and an insulation film by placing a Cu alloy coverage layer between Cu-based wiring and a protective insulation film. CONSTITUTION:A SiO2 or other insulation film 5 is placed on the active region formed on an Si substrate 4 and after a thin Cu film has been formed by sputter deposition on the surface of insulation film 5, patterning is performed to process a Cu wiring main body 1. Next, a thin Cu-Si alloy film 2a is selectively grown by a CVD process on the exposed surfaces of the Cu wiring main body 1 and after that, a CVD process is again used to form a PSG protective insulation film 6 on the Cu wiring 3a covered with a Cu-Si alloy layer and on the insulation film 5 to complete the semiconductor device. During this, since the Si contained in the Cu-Si alloy coverage layer 2a forms an SiO2 protection layer, no oxidation of the Cu wiring main body 1 occurs. As a result, excellent adhesion can be achieved between the Cu wiring 1 and the protective insulation film 6.

Inventors

  • 👤 Takashi Kawanoue
  • 👤 川ノ上 孝
  • 👤 Masahiko Hasunuma
  • 👤 正彦 蓮沼
  • 👤 Atsuhito Sawabe
  • 👤 厚仁 澤邊
  • 👤 Yoshiko Kobanawa
  • 👤 小塙 佳子
  • 👤 Hisafumi Kaneko
  • 👤 尚史 金子
  • 👤 Shuichi Komatsu
  • 👤 小松 周一

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-02 12:20
CPC Classifications
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