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JPH04115751A Expired / Lapsed JP ⏱️ 0.0 years remaining

Data converter device

Assignee: Pioneer Corp
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Filing: 1990-09-05
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Granted: —
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Expires: 2010-09-05
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Abstract

Abstract PURPOSE:To realize desired Tmin, Tmax and to eliminate a DC component efficiently by inserting DC control bits comprising a prescribed bit number to an input data series for each prescribed interval and implementing code conversion. CONSTITUTION:A DC control bit '00' is inserted to an input data series at a redundant data series recovery circuit 2 synchronously with a DC control bit insertion pulse from a timing signal generating circuit 15 and the resulting data is inputted to a transform circuit 4. A redundant data series generating circuit 3 insets a DC control bit '11' to the data. A DSV calculation circuit 14 obtains an accumulated DSV from the initial state. A selection control circuit 13 gives a control signal to each circuit that an output of a synchronizing signal insertion circuit 6 is selected by a selection circuit 10 when the absolute value of the accumulation of actual DSV values by a DSV calculation circuit 11 is smaller and an output of a synchronizing signal insertion circuit 7 is selected by the selection circuit 10 when the absolute value of the accumulation of actual DSV values by a DSV calculation circuit 12 is smaller.

Inventors

  • 👤 Yoshiaki Moriyama
  • 👤 義明 守山

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-08 12:38
CPC Classifications
—

Claims Analysis

Total Claims: 0
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References Cited (Backward Citations)

JPS62122359A Cited
JPS62150568A Cited
JPS62283719A Cited

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