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JPH0349300A Expired / Lapsed JP ⏱️ 0.0 years remaining

Printed circuit board

Assignee: Fanuc Corp
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Filing: 1989-07-18
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Granted: —
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Expires: 2009-07-18
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Abstract

Abstract PURPOSE:To reduce noise from other signals by covering the surrounding of a signal pattern by a first conductive layer, its upper part by a second conductive layer, its lower part by a third conductive layer grounding all those layer patterns. CONSTITUTION:In a printed circuit board having a plurality of conductive layers, there are lands 11 and 12 for mounting component on both ends of a signal pattern 1. A grounding pattern 10 is isolated from them and connected with an upper and lower conductive layers with a land 13. A grounding pattern 20 is installed on an upper part of conductive layer of the signal pattern 1, and connected with the land 13 of the grounding pattern 10 with a penetration hole of a land 23. The pattern 20 is provided with lands 21 and 22 equivalent to the lands 11 and 12 of the signal 1, and it is isolated from the grounding pattern. A grounding pattern 30 is installed on a conductive layer under the conductive layer of the signal pattern 1 so that a land 33 of the grounding pattern 30 may be connected with the land 13 of the pattern 10. It is also provided with lands 31 and 32 isolated from the pattern 30. The signal pattern 1 is completely electromagnetically shielded from other signals so as to reduce noise from other signals.

Inventors

  • 👤 Minoru Nakamura
  • 👤 稔 中村

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-08 18:43
CPC Classifications
H; H05; H05K; H05K1/00; H05K1/02; H05K1/0213; H05K1/0216; H05K1/0218; H05K1/0296; H05K1/0298

Claims Analysis

Total Claims: 0
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References Cited (Backward Citations)

JPS59188992A Cited

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