Test signal generating circuit

Abstract

Abstract PURPOSE:To prevent the malfunction due to the noise by producing a test signal after deciding the levels the 1st - 3rd reset signals having different active levels and the level of the output signal of a test level detecting circuit. CONSTITUTION:A test enable flag 5 is set when a test level detecting signal TLD is inputted in a period during which a 1st reset signal RES 1 is set at a release level, then a 2nd reset signal RES 2 is set at a release level. While the flag 5 is kept in a set state when the signals TLD are continuously inputted in a period during which the signal RES 2 is set at a release level, then a 3rd reset signal RES 3 is set at a release level. Then, the flag 5 is cleared if the signals TLD are not continuously inputted. A 2nd control circuit 6 produces a test signal TEST only when the output signal of the flag 5 is kept at a set state and the signal TLD is produced. Thus the noise malfunction tolerance is improved.

Inventors

• 👤 Kazuhiko Fujiwara
• 👤 和彦 藤原

Bibliographic Details