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JPH0322432A Expired / Lapsed JP ⏱️ 0.0 years remaining

Semiconductor device

Assignee: NEC Corp
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Filing: 1989-06-19
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Granted: —
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Expires: 2009-06-19
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Abstract

Abstract PURPOSE:To form electrodes having desired wiring width without generating failure such as a short circuit between the electrodes by forming an insulator region just under a second conductor region in structure having excellent flatness. CONSTITUTION:A gate oxide film 2, a gate electrode 3 and an n-type impurity region 4 are shaped to a p-type silicon substrate 1, thus acquiring a MIS type transistor. A PSG film 5 is formed onto the surface of the transistor, and a contact opening section 6 is shaped to the film 5. A tungsten silicide electrode 7 is formed for a wiring and a PSG film 8 for insulating a section between wiring layers on the surface of the PSG film 5. An indentation 9 is shaped to the PSG film 8 just above the contact opening section 6 at that time. A spin-on glass film 10 having low viscosity is formed so as to bury the inside of the indentation 9 on the surface of the PSG film 8. A shallow indentation 11 is shaped to the spin on glass film 10 just above the contact opening 6 at that time. The contact opening is formed selectively, and an aluminum electrode 12 is shaped choicely for wirings.

Inventors

  • 👤 Masayuki Yanagisawa
  • 👤 柳澤 正之

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-08 16:05
CPC Classifications
—

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