Semiconductor device and its manufacturing method

Abstract

Abstract PURPOSE:To obtain a high integration CMOS semiconductor device having no latchup and high reliability by covering a n-type MOSFET region and a P-type MOSFET region with insulating films on all the regions of lower and side faces. CONSTITUTION:Two Si substrates 11, 14 of any of OZ, MCZ and FZ are thermally oxidized, thermal oxide films SiO2 12, 13 are formed, and the substrates 11, 14 are adhered. Then, the substrate 14 is ground from its rear surface, and an Si layer 14, of a suitable thickness is formed. An element isolating region of the film 14' is selectively Si-removed, and the bottom of a groove 15 reaches a base SiO2 films 12, 13. Thereafter, an SiO2 film 16 is formed by a thermal oxidation. The film 14, is surrounded at all upper, lower and side faces with the films 12, 13 and 16. An n-channel MOSFET having a gate electrode 19, n<+> type diffused layer source/drain 23 is formed in a P-well of 14'P, a P-channel MOSFET having similarly a P<+> type diffused layer is formed in the n-well of the 14'n, and AL wirings 22 connect the layers 23, 24 via contact holes provided at an interlayer insulting film 21.

Inventors

• 👤 Juri Kato
• 👤 樹理 加藤

Bibliographic Details