User's interface apparatus

Abstract

Abstract PURPOSE: To facilitate the confirmation work while saving the memory and enhancing the efficiency of user by generating user selection templates for the timing characteristics, direction and mask of each channel during a single test vector interval. CONSTITUTION: A driver logic circuit 18 generates a tri-state signal depending on the logical content of forbidden data from a forbidden register 21. The circuit 18 also generates a stimulus signal containing the logical content of a stimulus/expectation data signal having accurate edge timing being controlled by a drive clock from a stimulus timing circuit 20. Timing between a captured signal and an expected signal is controlled through selection of a comparison clock from a comparison timing circuit 24 and by the information contained in a comparison format signal from a comparison register 28. Subsequently, user selection templates for the timing characteristics, direction and mask of each channel are generated during a single test vector interval and associated with the test vector.

Inventors

• 👤 Wendell W Damm
• 👤 ウェンデル・タブリュ・ダム
• 👤 Keith A Taylor
• 👤 ケイス・アラン・ティラー
• 👤 Ira G Pollock
• 👤 イラ・ジー・ポロック
• 👤 Pedro M Janowitz
• 👤 ペドロ・エム・シャノウィツ

Bibliographic Details