Bi-mos semiconductor device and manufacture thereof

Abstract

Abstract PURPOSE:To make a Bi-MOS semiconductor high in density and performance by a method wherein a bipolar and a MOS transistor are formed on a silicon single crystal layer of an SOI (Silicon on Insulator) structure through a common process. CONSTITUTION:A SiO2 layer 2 and a p-type silicon single crystal layer 3 are formed on a silicon substrate 1, and a p-type diffusion region 50, an n-type well 70, an isolation insulating layer 4, a gate, and an insulating layer 8 are formed on a bipolar and a MOS transistor regions 5 and 7 respectively, and then polycrystalline silicon is deposited thereon and impurity is injected thereinto, and patterning is performed to provide a base lead-out electrode 72, and gates 6G and 7G to the region 5 and the MOS transistor regions 6 and 7 respectively. After an n-type impurity region 62 has been formed, a SiO2 layer is deposited, which is etched back to form a side wall 18 and a layer 17. A process follows, where a thermal oxidation is executed to make the impurity diffuse into the region 50 for the formation of a p<+> impurity region 52 and a through-oxide film 20. Next, impurity is injected into the layer 3 to form an n<+> impurity region 53, an n<+> impurity region 63, and a p<+> impurity region 73 on the regions 5, 6, and 7 respectively, and then a protective layer 22 and an electrode 24 are formed.

Inventors

• 👤 Hiroshi Goto
• 👤 寛 後藤

Bibliographic Details