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JPH0242764A Expired / Lapsed JP ⏱️ 0.0 years remaining

Vertical type mosfet

Assignee: Toshiba Corp
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Filing: 1988-08-01
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Granted: —
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Expires: 2008-08-01
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Abstract

Abstract PURPOSE:To be resistant to destruction when an inductive load is driven by a method wherein a high-resistance region is formed in one part of polycrystalline silicon for gate electrode use near a plurality of individual unit FET cells in order to reduce a difference in a switching speed. CONSTITUTION:The following are formed: high-resistance regions 19, of gate electrodes 15, which are shaped to be squared rings surrounding individual opening parts 16 near the individual opening parts 16 and whose resistivity has been made sufficiently high as compared with the gate electrodes 15 whose resistance has been made low. As a result, a gate-source capacitance CGS and a gate registance Rg become equal at individual unit FET cells 22; although a speed is lowered as a whole as compared with a conventional case, individual switching speeds become mutually equal. As a result, when a switching operation of an inductive load is controlled, an electric current flows to a specific unit FET cell in a concentrated manner and it is possible to prevent this cell from being destroyed. Thereby, this MOSFET becomes resistant to destruction when the inductive load is driven.

Inventors

  • 👤 Kazuaki Suzuki
  • 👤 鈴木 一昭

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-30 11:19
CPC Classifications
—

Claims Analysis

Total Claims: 0
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References Cited (Backward Citations)

JPS52127780A Cited
JPS5817676A Cited
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