Packet transfer system

Abstract

Abstract PURPOSE:To reduce the invalid processing of a network due to a packet not satisfying the condition of a delay time by detecting the packet not satisfying the condition of the delay time as soon as possible, and deleting the packet at a time when it is detected. CONSTITUTION:Data from a terminal 1 is assembled to the packet at a packet assembling/disassembling device 3, and is received by the reception circuit 5 of a packet switching machine 12. A received packet is divided into the packets with length less than constant length, and they are stored in a buffer memory 7. A receiving address field and an allowable delay time field are attached on information stored in the memory 7. Also, a propagation delay time between the switching machines 12 and 15 is calculated, and a calculated value is subtracted from the value of the allowable delay time field, and when a result shows a positive value, a subtraction result is re-set on the allowable delay time field, then, is transferred to the packet switching machine 15. And when it is not the positive value, the packet is deleted. The packet switching machine 15 processes the packet by a similar procedure, which enables the invalid processing to be reduced.

Inventors

• 👤 Mitsuru Asamura
• 👤 浅村　満
• 👤 Yukio Honda
• 👤 本田　行雄
• 👤 Hiroyuki Nakano
• 👤 裕行 中野
• 👤 Satoshi Sakai
• 👤 坂井　敏

Bibliographic Details