Manufacture of semiconductor memory device

Abstract

Abstract PURPOSE:To increase electrostatic capacity between gates and obtain an EPROM which enables improvement of write-in speed of information by a method wherein a thin integrate insulation film with a polycrystalline silicon layer containing impurities with high concentration provided only on the rim is formed by oxidizing a polycrystalline silicon layer which does not contain impurities, and impurities are diffused by solid phase, etc. CONSTITUTION:A linear polycrystalline silicon layer 42 which does not contain impurities is formed at the center of a memory cell region 11, and a polycrystal siliconlayer 51 which contains impurities with high concentration is formed and etched so that the layer 51 remains at a rim 52 of the linear polycrystalline silicon layer 42. Then the polycrystalline silicon layers 52, 42 are oxidized to have impurities contained in the polycrystalline silicon layer 52 solid-phase diffused into the polycrystalline silicon layer 42, so that a floating gate 4 consisting of a polycrystalline silicon layer containing impurities and a thin intergate insulation film 5 are formed. Then with the floating gate 4 used as a mask, a source 12 and a drain 13 are formed by ion-implanting reverse conductive type impurities, and a control gate 6 extending on the floating gate 4 is formed.

Inventors

• 👤 Yoshiki Hasegawa
• 👤 芳樹 長谷川

Bibliographic Details