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JPH02236734A Expired / Lapsed JP ⏱️ 0.0 years remaining

Emulation system for microprocessor

Assignee: NEC Corp
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Filing: 1989-03-10
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Granted: —
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Expires: 2009-03-10
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Abstract

Abstract PURPOSE:To enable emulation to be performed even when architecture is remarkably different by switching the output of an instruction decode unit and that of an emulation memory appropriately, and inputting them to a second microprocessor. CONSTITUTION:The instruction decode unit 3 fetches and decodes the instruction of a first microprocessor, and outputs the instruction of a second microprocessor 1 required for the emulation of the above instruction. Also, the emulation memory 4 holds another instruction of the second microprocessor 1 required for the emulation of the instruction of the first microprocessor. When the emulation is performed by using the second microprocessor having the architecture different from that of the first microprocessor, the output of the instruction decode unit 3 and that of the emulation memory 4 are switched appropriately and inputted to the second microprocessor 1. Thereby, it is possible to easily perform the emulation even by the microprocessor having remarkably different architecture.

Inventors

  • 👤 Tetsuo Miura
  • 👤 三浦 哲雄
  • 👤 Daisaku Ide
  • 👤 井手 大作

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-03 06:48
CPC Classifications
—

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