Semiconductor integrated circuit

Abstract

Abstract PURPOSE:To facilitate predetermining the potential of a region having the same conductivity tape as a semiconductor substrate at a value independent from the potential of the substrate by a method wherein the region is isolated from the substrate by semiconductor layers having the different conductivity type provided around the region. CONSTITUTION:Well regions 12 and 13 are surrounded by an n<+>-type buried layer 11 and n<+>-type diffused layers 18 and 18 and isolated from a p<->-type semiconductor substrate 1 and p<+>-type diffused layers 19 and 20 in their neighborhood by p-n isolation. The well region in which an n-MOS 5 is formed is surrounded by the n<+>-type diffused layers 18, the n<+>-type buried layer 11 and the like to which the highest potential in a circuit employing a MISFET is applied and the potential of the well region can be predetermined at an arbitrary value lower than the potential of the respective layers 11 and 18 and the like and the potential difference between the well region and the semiconductor substrate 1 can be predetermined arbitrarily.

Inventors

• 👤 Katsushi Asahina
• 👤 朝比奈　克志
• 👤 Satoshi Takano
• 👤 聡 高野
• 👤 Masahiro Ueda
• 👤 昌弘 植田
• 👤 Atsushi Oba
• 👤 敦 大庭
• 👤 Toru Shiomi
• 👤 徹 塩見
• 👤 Shigeki Obayashi
• 👤 茂樹 大林

Bibliographic Details