P-channel insulated-gate bipolar transistor

Abstract

Abstract PURPOSE:To prevent avalanche breakdown in turning off by providing an intermediate layer having an intermediate resistivity in the place where a p<-> type third layer is in contact with a p<+> type second layer. CONSTITUTION:An n<-> type first layer (n<+> type substrate) 1, a p-type second layer (p<+> type layer) 2 and a p-type third layer (p<-> type layer) 3 are formed adjacent to each other and an n-type first region (n<+> type layer) 4 is formed selectively on the surface of the p<-> type layer 3. Further, a p-type second region (p<+> type layer) 5 is formed selectively on the surface of the n<+> type layer 4. A gate electrode 7 is provided on the n<+> type layer 4 interposed between the p<-> type layer 3 and the p<+> type layer 5, through an insulating film 6. The p<-> type layer 3 is in contact with the p<+> type layer 2 through a layer 10 having an intermediate resistivity between the resistivity of the p<-> type layer 3 and that of the p<+> type layer 2. According to such arrangement, positive feedback to collector current occurs hardly and avalanche breakdown can be prevented effectively during low-load turning off.

Inventors

• 👤 Hiroshi Haruki
• 👤 春木　弘
• 👤 Noriyuki Iwamuro
• 👤 憲幸 岩室

Bibliographic Details