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JPH0216809A Expired / Lapsed JP ⏱️ 0.0 years remaining

Comparator with latch

Assignee: NEC Corp
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Filing: 1988-07-04
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Granted: —
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Expires: 2008-07-04
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Abstract

Abstract PURPOSE:To prevent the output of a comparator from fluttering at every clock even if an input voltage is equal to a reference voltage by giving a hysteresis characteristic to the action of the comparator with latch. CONSTITUTION:A prescribed little current is caused to flow in the base of a transistor Q7 by a bias voltage VB and the prescribed current is caused to flow in a collector, whereby a system is prevented from being completely turned off. Thus, the output voltage of the OUT terminal of the comparator with respect to the voltage VIN shows a hysteresis action when the input voltage VIN is raised and is dropped. With the hysteresis characteristic, the voltage VIN is almost equal to the reference voltage VREF, the change of the output voltage in the comparator is delayed by the shifted amount of the voltage of hysteresis even if the size relation of VIN and VREF is continuously exchanged at every period of the clock, whereby the output of the comparator is prevented from fluttering.

Inventors

  • 👤 Masahiro Funahashi
  • 👤 舟橋 政弘

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-05 07:58
CPC Classifications
—

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