Switching system and its configuration method

Abstract

Abstract PURPOSE:To intend the efficient use of a memory and the suppression of cell disappearance by providing a buffer to store the vacant address of a main buffer and a means to control a busy address correspondingly to an outgoing line. CONSTITUTION:The write of a cell is performed as follows. The destination outgoing line number of a parallel-converted cell is inputted to an address pointer 104. Here, a write address previously inputted from an idle address FIFO 103 is obtained, and the cell is written in the main buffer 105. The read of the cell is performed by obtaining a read address from the address pointer 107 according to a number generating in a control counter 107. The value of the counter 107 corresponds to the outgoing line number. The used read address is sent to the FIFO 103, and is used as the write address. Thus, since the vacant address is obtained from the idle address independently of the destination outgoing line of the cell, the write can be performed whenever vacancy exists. Besides, since the address in which the cell is stored does not return to the idle address before it is read, overwrite can be prevented.

Inventors

• 👤 Yoshito Sakurai
• 👤 櫻井　義人
• 👤 Kaneichi Otsuki
• 👤 大槻　兼市
• 👤 Shinobu Gohara
• 👤 郷原　忍
• 👤 Makoto Mori
• 👤 誠 森
• 👤 Akira Horiki
• 👤 堀木　晃
• 👤 Takao Kato
• 👤 孝雄 加藤
• 👤 Hiroshi Kuwabara
• 👤 弘 桑原

Bibliographic Details