Electrostatic protective circuit

Abstract

Abstract PURPOSE:To prevent the generation of a latch-up and to contrive an effective protection against a high-voltage and low-capacity static breakdown by a method wherein a circuit is constituted in such a way that the collectors and emitters of parasitic lateral transistors are each connected to the same power terminals. CONSTITUTION:A circuit is constituted in such a way that collectors and emitters of parasitic lateral transistors Tr 21 and Tr 22, which are respectively formed of a P<+> diffused layer 32 and an N<+> diffused layer 34 of a MOSFET Tr2 and a P<+> diffused layer 33 and an N<+> diffused layer 35 of a MOSFET Tr1, are each connected to each one side only of VCC terminals and GND terminals in the same transistor. Thereby, even though noise is mixed in nodes N 21 and N 22, the Trs 21 and 22 are merely turned-ON through the nodes N 21 and N 22, it cannot occur that one of the Trs 21 and 22 is turned-ON and the other is turned-ON by that turn-ON and thus no current is made to flow between the VCC and GND terminals. Accordingly, when the noise, which is applied to the nodes N 21 and N 22, is removed, a current path is entirely eliminated, latch up does not occur and an effective protection against a static breakdown can be contrived.

Inventors

• 👤 Shinichiro Koba
• 👤 信一郎 木場
• 👤 Hiroshi Baba
• 👤 浩志 馬場
• 👤 Shinichi Inoue
• 👤 信一 井上

Bibliographic Details