Patent JP2002118049A successfully refreshed from Google Patents.
JP2002118049A
Expired / Lapsed
JP
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Method for manufacturing semiconductor integrated circuit device
Assignee: Hitachi Ltd
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Filing: 2000-10-06
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Granted: —
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Expires: 2020-10-06
Abstract
Abstract Translated from Japanese (57)【要約】 【課題】 半導体集積回路装置の生産性を向上させる。 【解決手段】 半導体集積回路装置の製造過程に応じ て、メタルからなる遮光パターンを有するフォトマスク と、レジスト膜からなる遮光パターン7aを有するフォ トマスクMR1とで使い分けて露光処理を行う。 [PROBLEMS] To improve the productivity of a semiconductor integrated circuit device. According to a manufacturing process of a semiconductor integrated circuit device, an exposure process is performed by selectively using a photomask having a light-shielding pattern made of a metal and a photomask MR1 having a light-shielding pattern 7a made of a resist film.
Inventors
- 👤 Hiroshi Miyazaki
- 👤 浩 宮崎
- 👤 Kazutaka Mori
- 👤 和孝 森
- 👤 Norio Hasegawa
- 👤 昇雄 長谷川
- 👤 Tsuneo Terasawa
- 👤 恒男 寺澤
- 👤 Toshihiko Tanaka
- 👤 稔彦 田中
Bibliographic Details
Application Number
—
Jurisdiction
JP
Data Source
google_patents
Last Synchronized
2026-11-09 05:40
CPC Classifications
G; G03; G03F; G03F1/00; G03F1/54; G03F1/56; H; H10; H10P; H10P76/00; G03F7/00; G03F7/70; G03F7/70425; G03F7/70433; G03F7/70483; G03F7/70605; G03F7/70616
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