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JP2000286304A Expired / Lapsed JP ⏱️ 0.0 years remaining

Semiconductor element manufacturing method, semiconductor element, semiconductor device manufacturing method, semiconductor device, and mounting module

Assignee: Seiko Epson Corp
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Filing: 1999-03-31
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Granted: —
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Expires: 2019-03-31
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Abstract

Abstract Translated from Japanese (57)【要約】 【課題】 本発明は、半導体素子の製造方法、および半 導体素子、および半導体装置の製造方法、および半導体 装置、ならびに実装モジュールに関する。特に、ベアチ ップのフリップチップ実装に関する。 【解決手段】 半導体素子(100)側のパッド部に貫 通穴部(103)を設け、前記穴部に基板側の突起電極 (202)を挿入させる。挿入により接続エネルギーを 低くして接続を行う。また、貫通穴方向へのバンプ材料 の逃げを設け接続を行うことと、貫通穴により接続状態 を評価することを行う。 (57) Abstract: The present invention relates to a method for manufacturing a semiconductor element, a semiconductor element, a method for manufacturing a semiconductor device, a semiconductor device, and a mounting module. In particular, it relates to flip chip mounting of bare chips. SOLUTION: A through hole (103) is provided in a pad portion on a semiconductor element (100) side, and a projecting electrode (202) on a substrate side is inserted into the hole portion. Connection is made by lowering the connection energy by insertion. In addition, the connection is performed by providing a relief of the bump material in the direction of the through hole, and the connection state is evaluated by the through hole.

Inventors

  • 👤 Yohei Kurashima
  • 👤 羊平 倉島

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-09 18:15
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/10; H10D62/117; H10W; H10W90/00; H10W90/701; H10W90/721; H10W90/724

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