Patent EP1074945A2 successfully refreshed from Google Patents.
EP1074945A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Method and apparatus for controlling compressed Z information in a video graphics system
Assignee: ATI International SRL
•
Filing: 2000-08-04
•
Granted: —
•
Expires: 2020-08-04
Abstract
Abstract A method and apparatus for managing compressed Z information in a video graphics system is described. Pixels in a display frame are grouped into a plurality of pixel blocks (22-26), where each pixel block (22-26) includes a plurality of pixels. When possible, the Z information corresponding to the plurality of pixels in a pixel block (22-26) is compressed and stored in a Z buffer (40) in a compressed format. A Z mask value for each pixel block (22-26) in the frame is stored in a Z mask memory (90), where the Z mask for each pixel block (22-26) indicates a level of compression of the Z information for each of the pixel blocks (22-26). When Z information for a pixel block (22-26) is required for processing operations, a cache (70) is first examined to determine if the Z information for the pixel block (22-26) is included in the cache (70). If the Z information is not included in the cache (70), the Z mask memory (90) is consulted to determine the level of compression of the Z information for the particular pixel block (22-26). Based on the indication provided by the Z mask memory (90) as to the level of compression, a predetermined amount of data is retrieved from the Z buffer (40), and when the Z information is in compressed format, it is decompressed. The fetched Z information is then stored in the cache (70) for use in video graphics processing.
Inventors
- 👤 Steven L. Morein
- 👤 Michael T. Wright
- 👤 Kin M. Yee
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-09 15:15
CPC Classifications
G; G06; G06T; G06T9/00; G01; G01R; G01R13/00; G01R13/02; G01R13/0218; G01R13/0254; G01R13/0263; G01R13/20; G01R13/22; G01R13/34; G01R13/345; G06T15/00; G06T15/10; G06T15/40; G06T15/405
Claims Analysis
Total Claims: 22
Claim 1
Independent Claim
162 words
A method for controlling compressed Z information, comprising: receiving coordinates corresponding to a pixel block of a frame, wherein the
frame includes a plurality of pixel blocks, wherein each pixel block of the plurality of
pixel blocks includes Z information for a plurality of pixels, wherein Z information for
each pixel represents spatial depth of the pixel; determining if Z information for the pixel block is present in a cache; when the Z information for the pixel block is not present in the cache: reading a Z mask value for the pixel block; fetching the Z information for the pixel block from a Z buffer, wherein the
Z mask value for the pixel block indicates a level of compression of the Z
information for the pixel block in the Z buffer; when the Z mask value indicates the Z information for the pixel block is
compressed, decompressing the Z information; and storing the Z information for the pixel block in the cache.
Claim 2
Dependent Claim
54 words
The method of claim 1, wherein when the Z mask value for the pixel block
indicates that the Z information for the pixel block is cleared Z information, reading the Z
mask value further comprises storing a clear value in the cache as the Z value corresponding to each of the
plurality of pixels.
Claim 3
Dependent Claim
126 words
The method of claim 1 or claim 2further comprising: modifying Z information corresponding to at least one of the plurality of pixels in
the pixel block; when the Z information for the pixel block can be compressed to a level
exceeding a compression threshold: compressing the Z information for the pixel block to produce compressed
Z information; storing the compressed Z information in the Z buffer; and updating the Z mask value to indicate compression level of the
compressed Z information; and when the Z information for the plurality of pixels cannot be compressed to the
level exceeding the compression threshold: storing the Z information for the pixel block in the Z buffer; and updating the Z mask value to indicate the Z information is uncompressed.
Claim 4
Independent Claim
45 words
The method of any one of the preceding claims, wherein reading the Z mask value
further comprises reading the Z mask value from a Z mask memory, wherein the Z mask
memory stores a corresponding Z mask value for each pixel block of the frame.
Claim 5
Dependent Claim
25 words
The method of claim 4, wherein each Z mask value includes a plurality of bits,
wherein the plurality of bits encodes the level of compression.
Claim 6
Dependent Claim
25 words
The method of claim 5, wherein the plurality of bits comprises two bits, wherein
encoded states of the two bits indicate four levels of compression.
Claim 7
Dependent Claim
17 words
The method of claim 6, wherein one level of the four levels of compression
indicates no compression.
Claim 8
Dependent Claim
299 words
A circuit for processing Z information, comprising: a cache storing Z information corresponding a cached set of pixel blocks of a
frame, wherein the frame includes a plurality of pixel blocks, wherein each pixel block of
the plurality of pixel blocks includes a plurality of pixels, wherein Z information for each
pixel represents spatial depth of the pixel; a Z mask memory storing a Z mask value for each of the plurality of pixel blocks
of the frame, wherein each Z mask value indicates a level of compression for a
corresponding pixel block; a Z buffer that stores buffered Z information for each pixel block of the frame,
wherein the Z information includes at least one Z value for each pixel of each pixel
block; a Z control block operably coupled to the cache, the Z buffer, and the Z mask
memory, wherein the Z control block receives coordinates corresponding to a selected
pixel in the frame, wherein the Z control block determines if Z information for a selected
pixel block that includes the selected pixel is included in the cached set of pixel blocks in
the cache, wherein when the Z information for the selected pixel block is not in the
cached set of pixel blocks, the Z control block reads a selected Z mask value
corresponding to the selected pixel block from the Z mask memory, wherein the Z
control block issues a read command to the Z buffer based on the selected Z mask value,
wherein the Z buffer returns buffered Z information corresponding to the selected pixel
block; and a decompression block operably coupled to the cache and the Z buffer, wherein
the decompression block decompresses buffered Z information received from the Z
buffer to produce uncompressed Z information that is stored in the cache.
Claim 9
Dependent Claim
97 words
The circuit of claim 8, further comprising a compression block operably coupled
to the cache and the Z buffer, wherein when an uncompressed set of Z information is
modified and flushed from the cache, the uncompressed set of Z information is
compressed by the compression block to produce a compressed set of Z information that
is stored in the Z buffer, wherein the Z control block updates an entry in the Z mask
memory corresponding to the compressed set of Z information such that it indicates the
level of compression of the compressed set of Z information.
Claim 10
Dependent Claim
54 words
The circuit of claim 9, wherein the compression block further comprises circuitry
such that when the uncompressed set of Z information cannot be compressed to a
compression level that exceeds a compression threshold, the compression block does not
compress the uncompressed data set which is then stored in uncompressed format in the
Z buffer.
Claim 11
Dependent Claim
33 words
The circuit of any one of claims 8 to 10, wherein each of the mask values stored
in the Z mask memory is an N-bit value that encodes a plurality of compression levels.
Claim 12
Dependent Claim
25 words
The circuit of claim 11, wherein one of the plurality of compression levels
indicates that Z information corresponding to a selected Z mask is uncompressed.
Claim 13
Dependent Claim
42 words
The circuit of claim 11 of claim 12, wherein read commands from the Z control
block fetch a predetermined quantity of buffered Z information, wherein at least a portion
of the plurality of compression levels correspond to multiples of the predetermined
quantity.
Claim 14
Dependent Claim
43 words
The circuit of any one of claims 8 to 13, wherein the Z buffer allocates a
predetermined amount of memory for each pixel block, wherein the predetermined
amount of memory is capable of storing Z information for a pixel block in uncompressed
format.
Claim 15
Dependent Claim
31 words
The circuit of any one of claims 8 to 14, wherein the cache, the Z mask memory,
the Z control block, and the decompression block are included on an integrated circuit.
Claim 16
Dependent Claim
193 words
A processor for managing compressed Z information, comprising: a processing module; memory operably coupled to the processing module, wherein the memory stores
operating instructions that, when executed by the processing module, cause the processor
to perform the functions of: receiving coordinates corresponding to a pixel block of a frame, wherein
the frame includes a plurality of pixel blocks, wherein each pixel block of the
plurality of pixel blocks includes Z information for a plurality of pixels, wherein
Z information for each pixel represents spatial depth of the pixel; determining if Z information for the pixel block is present in a cache; when the Z information for the pixel block is not present in the cache: reading a Z mask value for the pixel block; fetching the Z information for the pixel block from a Z buffer,
wherein the Z mask value for the pixel block indicates a level of
compression of the Z information for the pixel block in the Z buffer; when the Z mask value indicates the Z information for the pixel
block is compressed, decompressing the Z information; and storing the Z information for the pixel block in the cache.
Claim 17
Dependent Claim
69 words
The processor of claim 16, wherein the memory includes operating instructions
that, when executed, cause the processing module to read the Z mask value such that
when the Z mask value for the pixel block indicates that the Z information for the pixel
block is cleared Z information, the processor stores a clear value in the cache as the Z
value corresponding to each of the plurality of pixels.
Claim 18
Dependent Claim
144 words
The processor of claim 16 or claim 17, wherein the memory includes operating
instructions that, when executed, cause the processing module to perform the additional
functions of: modifying Z information corresponding to at least one of the plurality of pixels in
the pixel block; when the Z information for the pixel block can be compressed to a level
exceeding a compression threshold: compressing the Z information for the pixel block to produce compressed
Z information; storing the compressed Z information in the Z buffer; and updating the Z mask value to indicate compression level of the
compressed Z information; and when the Z information for the plurality of pixels cannot be compressed to the
level exceeding the compression threshold: storing the Z information for the pixel block in the Z buffer; and updating the Z mask value to indicate the Z information is uncompressed.
Claim 19
Dependent Claim
47 words
The processor of any one of claims 16 to 18, wherein the memory includes
operating instructions that, when executed, cause the processing module to read the Z
mask value by referencing a lookup table that stores a Z mask value for each pixel block
of the frame.
Claim 20
Dependent Claim
25 words
The processor of claim 19, wherein each Z mask value includes a plurality of bits,
wherein the plurality of bits encodes the level of compression.
Claim 21
Dependent Claim
25 words
The processor of claim 20, wherein the plurality of bits comprises two bits,
wherein encoded states of the two bits indicate four levels of compression.
Claim 22
Dependent Claim
17 words
The processor of claim 21, wherein one level of the four levels of compression
indicates no compression.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
Maintenance schedule is calculated for granted US utility patents.