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EP1071126A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Microcap wafer-level package with vias

Assignee: Avago Technologies International Sales Pte Ltd
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Filing: 2000-06-28
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Granted: —
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Expires: 2020-06-28
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Abstract

Abstract A microcap wafer-level package [10] is provided in which a micro device [14] is connected to bonding pads [16, 18] on a base wafer [12]. A peripheral pad [20] on the base wafer [12] encompasses the bonding pads [16, 18] and the micro device [14]. A cap wafer [24] is processed to form wells [40, 42] of a predetermined depth in the cap wafer [24]. A conductive material [27, 29] is made integral with the walls [46, 47] of the wells [40, 42] in the cap wafer [24]. The cap wafer [24] has contacts [30,32] and a peripheral gasket [22] formed thereon where the contacts [30,32] are capable of being aligned with the bonding pads [16, 18] on the base wafer [12], and the gasket [22] matches the peripheral pad [20] on the base wafer [12]. The cap wafer [24] is then placed over the base wafer [12] so as to bond the contacts [30, 32] and gasket [22] to the pads [16, 18, 20] and form a hermetically sealed volume [25] within the peripheral gasket [22]. The cap wafer [24] is thinned to form a "microcap" [24]. The microcap [24] is thinned below the predetermined depth until the conductive material [27, 29] is exposed to become conductive vias [26, 28] through the cap wafer [24] to outside the hermetically sealed volume [25].

Inventors

  • 👤 Richard C. Ruby
  • 👤 Tracy E. Bell
  • 👤 Frank S. Geefay
  • 👤 Yogesh M. Desai

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-03 10:18
CPC Classifications
B; B81; B81B; B81B7/00; B81B7/0032; B81B7/007; H; H10; H10W; H10W20/00; H10W20/01; H10W20/021; H10W20/023; H10W20/0245; H10W20/20; H10W20/211; H10W20/212; H10W20/2125; H10W76/00; H10W76/10; H10W76/12; H10W76/15; H10W76/153; H10W76/60; H10W72/00; H10W72/071; H10W72/075; H10W72/50; H10W72/531; H10W72/536; H10W72/59; H10W72/90; H10W72/921; H10W72/923; H10W72/9232; H10W72/926; H10W72/951; H10W72/952

Claims Analysis

Total Claims: 10
Claim 1
Independent Claim 167 words
A method of manufacturing a wafer package comprising: providing a first wafer (12), a second wafer (24), and a micro device (14); forming a bonding pad (16) and a peripheral pad (20) on said first wafer (12), said peripheral pad (20) encompassing said bonding pad (16); forming a seal (22) on said second wafer (24), said seal (22) configured to match said peripheral pad (20); forming a well (40) in said second wafer (24); forming a conductor (27) in said well (40) integral with said second wafer (24); bonding said first and said second wafers (12, 24) together using said seal (22) to form a hermetically sealed volume (25) therebetween, said second wafer (24) positionable with said conductor (27) in conductive contact with said bonding pad (16), and said micro device (14) disposed in said hermetically sealed volume (25) and connected to said bonding pad (16); and removing a portion of said second wafer (24) whereby said conductor (27) is exposed outside said hermetically sealed volume (25).
Claim 2
Dependent Claim 46 words
The method of manufacturing a wafer package as claimed in claim 1 wherein forming said conductor (27) in said well (40) includes: depositing said conductor (27) therein by a semiconductor deposition process whereby said conductor (27) is integral with the wall (46) of said well (40).
Claim 3
Dependent Claim 47 words
The method of manufacturing a wafer package as claimed in claim 1 or 2 wherein forming said conductor (27) in said well (40) includes: depositing a barrier layer (48) on said second wafer (24) around said well (40); and diffusing a dopant (27) in said well (40).
Claim 4
Dependent Claim 81 words
The method of manufacturing a wafer package as claimed in claim 1 wherein forming said conductor (27) in said well (40) includes: depositing a barrier layer (48) on said second wafer (24) around said well (40); diffusing a dopant (27) in said well (40); depositing a semiconductor material (50) in said well (40); annealing said second wafer (24) whereby said dopant (27) is diffused into said second wafer (24) and into said semiconductor material (50); and removing said barrier layer (48).
Claim 5
Dependent Claim 46 words
The method of manufacturing a wafer package as claimed in claim 1 wherein forming said conductor (27) in said well (40) includes: depositing a dopant-containing insulator (50) in said well (40); and annealing said second wafer (24) whereby dopant (27) diffuses from said dopant-containing insulator (50).
Claim 6
Dependent Claim 73 words
The method of manufacturing a wafer package as claimed in claim 1 wherein forming said conductor (27) in said well (40) includes: depositing a dopant-containing insulator (50) layer in said well (40); depositing a semiconductor material (62) over said dopant-containing insulator (60) layer in said well (40); annealing said second wafer (24) whereby dopant (64, 66) diffuses from said dopant-containing insulator (60) into said second wafer (24) and into said semiconductor material (62).
Claim 7
Independent Claim 77 words
The method of manufacturing a wafer package as claimed in one of the preceding claims wherein forming said first seal (22) includes: forming a seed layer (52) on said second wafer (24); photolithographically processing said seed layer (52) to leave a seal-patterned photoresist (54) thereon; depositing said seal (22) on said seed layer (52) using said seal-patterned photoresist (54); removing said seal-patterned photoresist (54); and selectively removing said seed layer (52) to connect to said conductor (27).
Claim 8
Independent Claim 59 words
The method of manufacturing a wafer package as claimed in one of the preceding claims including: depositing an outside bonding pad (34) on said conductor (27) exposed outside said hermetically sealed volume (25); placing said wafer package in a micro device utilizing system; and bonding conductors (36) between said wafer packaging utilizing device and said outside bonding pad (34).
Claim 9
Independent Claim 36 words
The method of manufacturing a wafer package as claimed in one of the preceding claims including: defining a recess (78) in one of said wafers (12, 24) whereby a tall micro device (75) can be accommodated.
Claim 10
Independent Claim 29 words
The method of manufacturing a wafer package as claimed in one of the preceding claims including: forming a semiconductor device (86, 88) in one of said wafers (82, 84).

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