Patent SE401300B successfully refreshed from Google Patents.
Patent EP0973189A2 successfully refreshed from Google Patents.
← Back to Patent Explorer
EP0973189A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

A method for gate-stack formation including a high-K dielectric

Assignee: Texas Instruments Inc
•
Filing: 1999-07-13
•
Granted: —
•
Expires: 2019-07-13
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A gate stack (104) including a gate dielectric with reduced effective electrical thickness. A thin (e.g., ∼ 15 Angstroms) silicon dioxide layer is formed on a substrate (102). Remote plasma nitridation of the silicon dioxide layer is performed to create a silicon-oxynitride layer (106) that is resistant to oxidation. A oxygen-containing high-K dielectric (108) is formed over the silicon-oxynitride layer (106) without additional oxidation of the layer (106). The gate electrode (110) is then formed over the high K dielectric (108).

Inventors

  • 👤 Sunil V. Hattangady
  • 👤 George A. Brown
  • 👤 Malcom J. Bevan

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-10-31 19:21
CPC Classifications
H; H10; H10D; H10D64/00; H10D64/01; H10D64/013; H10D64/01302; H10D64/01332; H10D64/01336; H10D64/01342; H10P; H10P10/00; H10P14/00; H10P14/60; H10P14/63; H10P14/6326; H10P14/6328; H10P14/6334; H10D64/01344; H10D64/60; H10D64/66; H10D64/68; H10D64/681; H10D64/685; H10D64/691; H10D64/693; H10P14/65; H10P14/6516; H10P14/6518; H10P14/6524; H10P14/6526; H10P14/6529; H10P14/6532; H10P14/69; H10P14/692; H10P14/6921; H10P14/6922; H10P14/6927; H10P14/6938; H10P14/69398

Claims Analysis

Total Claims: 11
Claim 1
Independent Claim 87 words
A method of fabricating an integrated circuit comprising: forming a silicon dioxide layer over a semiconductor body; subjecting said silicon dioxide layer to a remote plasma nitridation for converting said silicon dioxide layer to a silicon-oxynitride layer; forming a high-k dielectric layer over said silicon-oxynitride layer, said high-K dielectric layer having a dielectric constant greater than 10; forming a metal layer over said high-K dielectric layer; and patterning and etching said metal layer, said high-K dielectric layer, and said silicon oxynitride layer to form a gate stack.
Claim 2
Dependent Claim 27 words
The method of claim 1, wherein said step of forming said silicon dioxide layer comprises forming a silicon dioxide layer having a thickness less than 20 Angstroms.
Claim 3
Dependent Claim 40 words
The method of claim 1 or Claim 2, wherein said step of forming said high-k dielectric layer comprises forming a high-K dielectric layer comprising a material selected from a group of materials consisting of Ta2O5, BaTiO3, TiO2, CeO2, and BST.
Claim 4
Independent Claim 27 words
The method of any preceding claim, wherein said step of forming said metal layer comprises forming a metal layer comprising a tungsten layer overlying a titanium-nitride layer.
Claim 5
Independent Claim 57 words
The method of any preceding claim, wherein said step of subjecting said silicon dioxide layer to remote plasma nitridation comprises subjecting said silicon dioxide layer to remote plasma nitridation using a nitrogen containing precursor selected from a group consisting of N 2 Stet NH 3 or a mixture thereof with an inert gas or an oxidizing gas.
Claim 6
Independent Claim 40 words
The method of any preceding claim, wherein said step of subjecting said silicon dioxide layer to remote plasma nitridation comprises subjecting said silicon dioxide layer to remote plasma nitridation at a pressure in the range of 1 to 50 mTorr.
Claim 7
Independent Claim 33 words
The method of any preceding claim, wherein said step of subjecting said silicon dioxide layer to remote plasma nitridation comprising a plasma density in the range of 1x10 10 to 1x10 12 .
Claim 8
Independent Claim 31 words
The method of any preceding claim, wherein said step of subjecting said silicon dioxide layer to remote plasma nitridation comprising a nitrogen flow in the range of 1 to 100 sccm.
Claim 9
Dependent Claim 62 words
A MOSFET transistor comprising: a multi-layer gate dielectric formedoverlying a semiconductor body, said multi-layer gate dielectric comprising a layer of silicon-oxynitride and a layer of an oxygen-containing high dielectric constant material; a metal stet electrode overlying said multi-layer gate dielectric; a region on a first side of said gate electrode; and a stet region on a second side of said gate electrode.
Claim 10
Dependent Claim 16 words
The transistor of claim 9, wherein said silicon-oxynitride layer has a thickness less than 20 Angstroms.
Claim 11
Dependent Claim 28 words
The transistor of claim 9 or claim 10, wherein said high-dielectric constant layer comprises a material selected from a group consisting of Ta2O5, BaTiO3, TiO2, CeO2, and BST.

References Cited (Backward Citations)

No citation records indexed.

USPTO Annuity & Maintenance Windows

Maintenance schedule is calculated for granted US utility patents.

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag