Patent EP0971411A2 successfully refreshed from Google Patents.
EP0971411A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Semiconductor device
Assignee: Hitachi Ltd En Renesas Eastern Japan Semiconduct
•
Filing: 1999-07-01
•
Granted: —
•
Expires: 2019-07-01
Abstract
Abstract In a semiconductor device such as a high-frequency power amplifier module, a plurality of amplifying means are formed on a semiconductor chip which is mounted on a main surface of a wiring substrate, and electrodes of the semiconductor chip are electrically connected by wires to electrodes of the wiring substrate. In order to make the high-frequency power amplifier module small in size, a substrate-side bonding electrode electrically connected to a wire set at a fixed reference electric potential is placed at a location farther from a side of the semiconductor chip than a substrate-side output electrode electrically connected to an output wire. A substrate-side input electrode electrically connected to an input wire is located at a distance from the side of the semiconductor chip about equal to the distance from the side of the semiconductor chip to the substrate-side output electrode, or at a location farther from the side of the semiconductor chip than the substrate-side bonding electrode is. Particularly, in a high-frequency power amplifier module provided with a semiconductor chip having multistage amplifying transistors on a wiring substrate: an angle formed by a first auxiliary line connecting bonding portions to each other at the two ends of an input bonding wire connecting a bonding input electrode for a specific one of the amplifying transistors to the wiring substrate and a second auxiliary line connecting bonding portions to each other at the two ends of an output bonding wire connecting an bonding output electrode for another amplifying transistor at a stage following the specific amplifying transistor to the wiring substrate is in the range 72 degrees to 180 degrees; and a gap between bonding portions of the bonding input electrode and the bonding output electrode is at least 0.3 mm but smaller than 0.8 mm. As a result, the high-frequency characteristic of the power amplifier module can be improved and the size thereof can be reduced.
Inventors
- 👤 Iwamichi Kohjiro
- 👤 Sakae Kikuchi
- 👤 Yasuhiro Nunogawa
- 👤 Shizuo Kondo
- 👤 Tetsuaki Adachi
- 👤 Osamu Kagaya
- 👤 Kenji Sekine
- 👤 Eiichi Hase
- 👤 Kiichi Yamashita
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-07 15:11
CPC Classifications
H; H10; H10W; H10W72/00; H10W72/90; H03; H03F; H03F1/00; H03F1/56; H03F3/00; H03F3/189; H03F3/19; H03F3/195; H03F3/20; H03F3/21; H03F3/213; H03F3/60; H03F3/602; H03F3/604; H10W42/00; H10W42/20; H10W42/261; H10W42/265; H10W44/00; H10W44/20; H10W44/501; H10W70/00; H10W70/60; H10W70/62; H10W70/65; H10W70/657; H10W70/658; H10W70/67; H10W70/68; H10W70/685; H10W76/00; H10W76/10; H10W76/12; H10W90/00; H03F2200/00; H03F2200/12; H03F2200/168; H03F2200/222; H03F2200/255; H03F2200/318; H03F2200/387; H03F2200/408; H03F2200/411; H03F2200/423; H03F2200/451; H03F2200/543; H03H; H03H7/00; H03H7/38; H03H7/383; H05; H05K; H05K1/00; H05K1/02; H05K1/0213; H05K1/0237; H05K1/0243; H05K1/0296; H05K1/0298; H05K1/18; H05K1/182; H05K1/183; H05K3/00; H05K3/40; H05K3/403; H10W44/203; H10W44/206; H10W44/216; H10W44/226; H10W44/234; H10W70/654; H10W70/655; H10W70/682; H10W72/071; H10W72/075; H10W72/07551; H10W72/07552; H10W72/07554; H10W72/50; H10W72/521; H10W72/522; H10W72/541; H10W72/5445; H10W72/547; H10W72/5473; H10W72/5475; H10W72/551; H10W72/552; H10W72/5525; H10W72/555; H10W72/59; H10W72/851; H10W72/874; H10W72/884; H10W72/931; H10W72/932; H10W72/951; H10W90/701; H10W90/751; H10W90/754
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
290 words
A semiconductor device comprising: a semiconductor chip having a square surface; a wiring substrate having a main surface thereof used for
mounting said semiconductor chip; a first electrode formed on a first area of a main surface
of said semiconductor chip and placed at a location in close
proximity to a side of said semiconductor chip; first amplifying means formed on said first area of said
main surface of said semiconductor chip and provided with an input
unit electrically connected to said first electrode; a second electrode formed on a second area of said main
surface of said semiconductor chip and placed at a location in
close proximity to said side of said semiconductor chip; second amplifying means formed on said second area of said
main surface of said semiconductor chip and provided with an
output unit electrically connected to said second electrode; a third electrode formed on a third area between said first
and second areas of said main surface of said semiconductor chip; a fourth electrode formed on said main surface of said
wiring substrate to face said side of said semiconductor chip
and electrically connected to said first electrode by a first
wire; a fifth electrode formed on said main surface of said wiring
substrate to face said side of said semiconductor chip and
electrically connected to said second electrode by a second wire;
and a sixth electrode formed on said main surface of said wiring
substrate to face said side of said semiconductor chip and
electrically connected to said third electrode by a third wire
with an electric potential thereof fixed at a reference level, wherein said sixth electrode is placed at a location farther
from said side of said semiconductor chip than said fifth
electrode.
Claim 2
Dependent Claim
55 words
A semiconductor device according to claim 1, wherein
said fourth electrode is placed at a distance from said side of
said semiconductor chip about equal to a distance of said fifth
electrode from said side of said semiconductor chip or at a
location farther from said side of said semiconductor chip than
said sixth electrode.
Claim 3
Dependent Claim
28 words
A semiconductor device according to claim 1, wherein
an input unit of said second amplifying means is electrically
connected to an output unit of said first amplifying means.
Claim 4
Dependent Claim
18 words
A semiconductor device according to claim 1, wherein
said fourth electrode is electrically connected to said fifth
electrode.
Claim 5
Dependent Claim
505 words
A semiconductor device comprising: a semiconductor chip having a square surface; a wiring substrate having a main surface thereof used for
mounting said semiconductor chip; a first electrode formed on a first area of a main surface
of said semiconductor chip and placed at a location in close
proximity to a side of said semiconductor chip; first amplifying means formed on said first area of
said main surface of said semiconductor chip and provided with
an input unit electrically connected to said first electrode; a second electrode formed on a second area of said main
surface of said semiconductor chip and placed at a location in
close proximity to said side of said semiconductor chip; second amplifying means formed on said second area of said
main surface of said semiconductor chip and provided with an
output unit electrically connected to said second electrode; a third electrode formed on said main surface of said wiring
substrate to face said side of said semiconductor chip and
electrically connected to said first electrode by a first wire; a fourth electrode formed on said main surface of said
wiring substrate to face said side of said semiconductor chip
and electrically connected to said second electrode by a second
wire; a fifth electrode formed on a first area of said main surface
of said semiconductor chip at a location in close proximity to
another side of said semiconductor chip facing said side of said
semiconductor chip and electrically connected to an output unit
of said first amplifying means; a sixth electrode formed on a second area of said main
surface of said semiconductor chip at a location in close
proximity to said other side of said semiconductor chip and
electrically connected to an input unit of said second amplifying
means; a seventh electrode formed on said main surface of said
wiring substrate to face said other side of said semiconductor
chip and electrically connected to said fifth electrode by a third
wire; a eighth electrode formed on said main surface of said
wiring substrate to face said other side of said semiconductor
chip and electrically connected to said sixth electrode by a
fourth wire and further electrically connected to said seventh
electrode; a ninth electrode formed on said main surface of said wiring
substrate to face said side of said semiconductor chip, being
stretched on a third area between said first and second areas
of said main surface of said semiconductor chip and electrically
connected to one end of a fifth wire with an electric potential
thereof fixed at a reference level; and a tenth electrode formed on said main surface of said wiring
substrate to face said other side of said semiconductor chip and
electrically connected to the other end of said fifth wire, wherein said ninth electrode is placed at a location farther
from said side of said semiconductor chip than said fourth
electrode and said tenth electrode is placed at a location farther
from said other side of said semiconductor chip than said seventh
and eighth electrodes.
Claim 6
Dependent Claim
89 words
A semiconductor device according to claim 5 wherein: said third electrode is placed at a distance from said side
of said semiconductor chip about equal to a distance of said fourth
electrode from said side of said semiconductor chip or at a
location farther from said side of said semiconductor chip than
said ninth electrode; and said seventh electrode is placed at a distance from said
other side of said semiconductor chip about equal to a distance
of said eighth electrode from said other side of said
semiconductor chip.
Claim 7
Dependent Claim
229 words
A semiconductor device comprising: a semiconductor chip having a square surface; a wiring substrate having a main surface thereof used for
mounting said semiconductor chip; a first electrode formed on a first area of a main surface
of said semiconductor chip and placed at a location in close
proximity to a side of said semiconductor chip; first amplifying means formed on said first area of said
main surface of said semiconductor chip and provided with an input
unit electrically connected to said first electrode; a second electrode formed on a second area of said main
surface of said semiconductor chip and placed at a location in
close proximity to said side of said semiconductor chip; second amplifying means formed on said second area of said
main surface of said semiconductor chip and provided with an
output unit electrically connected to said second electrode; a third electrode formed on said main surface of said wiring
substrate and electrically connected to said first electrode by
a first wire; and a fourth electrode formed on said main surface of said
wiring substrate and electrically connected to said second
electrode by a second wire, wherein: said fourth electrode is placed at a location facing a side
of said semiconductor chip; and said third electrode is placed at a location facing another
side of said semiconductor chip crossing said side of said
semiconductor chip.
Claim 8
Dependent Claim
28 words
A semiconductor device according to claim 7, wherein
an input unit of said second amplifying means is electrically
connected to an output unit of said first amplifying means.
Claim 9
Dependent Claim
28 words
A semiconductor device according to claim 1, wherein
said first and second amplifying means each comprise a plurality
of field-effect transistors electrically connected to each other
in parallel.
Claim 10
Dependent Claim
184 words
A semiconductor device comprising: a wiring substrate
having a base made of a dielectric material; and a semiconductor
chip placed on said wiring substrate wherein: amplifying transistors of two or more stages, a bonding
input electrode for inputting a high-frequency power to said
amplifying transistors and a bonding output electrode for
outputting a high-frequency power from said amplifying
transistors are formed on said semiconductor chip; an angle formed by a first auxiliary line connecting bonding
portions to each other at the two ends of an input bonding wire
connecting said bonding input electrode for a specific one of
said amplifying transistors to said wiring substrate and a second
auxiliary line connecting bonding portions to each other at the
two ends of an output bonding wire connecting said bonding output
electrode for another one of said amplifying transistors at a
stage following said specific amplifying transistor to said
wiring substrate is in the range 72 degrees to 180 degrees; and a gap between bonding portions of said bonding input
electrode and said bonding output electrode is at least 0.3 mm
but smaller than 0.8 mm.
Claim 11
Dependent Claim
185 words
A semiconductor device comprising: a wiring substrate
having a base made of a dielectric material; and a semiconductor
chip placed on said wiring substrate wherein: amplifying transistors of two or more stages, a bonding
input electrode for inputting a high-frequency power to said
amplifying transistors and a bonding output electrode for
outputting a high-frequency power from said amplifying
transistors are formed on said semiconductor chip; an angle formed by a first auxiliary line connecting bonding
portions to each other at the two ends of an input bonding wire
connecting said bonding input electrode for a specific one of
said amplifying transistors to said wiring substrate and a second
auxiliary line connecting bonding portions to each other at the
two ends of an output bonding wire connecting said bonding output
electrode for another one of said amplifying transistors at a
stage following said specific amplifying transistor to said
wiring substrate is in the range 72 degrees to 180 degrees; and a coefficient of stability of said specific amplifying
transistor and said other amplifying transistor at said stage
following said specific amplifying transistor is 1 or more.
Claim 12
Dependent Claim
22 words
A semiconductor device according to claim 10, wherein
an angle formed by said first and second auxiliary lines is about
90 degrees.
Claim 13
Dependent Claim
137 words
A semiconductor device according to claim 10, wherein: said semiconductor chip has a rectangular shape; a bonding output electrode electrically connected to a
plurality of said output bonding wires for said other amplifying
transistor at said following stage is placed at a location in
close proximity to a first side of said semiconductor chip; a bonding input electrode for said other amplifying
transistor at said following stage and a bonding output electrode
for said specific amplifying transistor are placed at a location
in close proximity to a second side of said semiconductor chip
facing said first side; and a bonding input electrode electrically connected to said
input bonding wire for said specific amplifying transistor is
placed at a location in close proximity to a third side of said
semiconductor chip other than said first and second sides.
Claim 14
Dependent Claim
148 words
A semiconductor device according to claim 10, wherein: said amplifying transistors are electrically connected to
form three stages; one of said amplifying transistors is placed at an input
Stage; another one of said amplifying transistors is placed at
an intermediate stage following said input stage; the last amplifying transistor is placed at an output stage
following said intermediate stage; and an angle formed by a third auxiliary line connecting bonding
portions to each other at the two ends of an input bonding wire
connecting a bonding input electrode for said other amplifying
transistor at said intermediate stage to said wiring substrate
and a fourth auxiliary line connecting bonding portions to each
other at the two ends of an output bonding wire connecting a bonding
output electrode for said last amplifying transistor at said
output stage to said wiring substrate is in the range 72 degrees
to 180 degrees.
Claim 15
Dependent Claim
22 words
A semiconductor device according to claim 14, wherein
an angle formed by said third and fourth auxiliary lines is about
90 degrees.
Claim 16
Dependent Claim
124 words
A semiconductor device according to claim 15, wherein: an angle formed by said third auxiliary line connecting
said bonding portions to each other at said two ends of said input
bonding wire connecting said bonding input electrode for said
other amplifying transistor at said intermediate stage to said
wiring substrate and said fourth auxiliary line connecting said
bonding portions to each other at said two ends of said output
bonding wire connecting said bonding output electrode for said
last amplifying transistor at said output stage to said wiring
substrate is about 0 degrees; a shield bonding wire is provided between said third and
fourth auxiliary lines; and the two ends of said shield bonding wire are electrically
connected to the ground at high frequencies.
Claim 17
Dependent Claim
145 words
A semiconductor device according to claim 10 wherein: said wiring substrate has: a cavity with 4 sides, namely, first to fourth sides; a first matching circuit formed at a location in close
proximity to said first side; a second matching circuit formed at a location in
close proximity to said second side facing said first side; and a third matching circuit formed at a location in close
proximity to said third side other than said first and second
sides; said first matching circuit is electrically connected to
said output bonding wire of said other amplifying transistor at
said following stage; said second matching circuit is electrically connected
between an output of said specific amplifying transistor and an
input of said other amplifying transistor at said following stage;
and said third matching circuit is electrically connected to
said input bonding wire of said specific amplifying transistor.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
Maintenance schedule is calculated for granted US utility patents.