Patent EP0954101A2 successfully refreshed from Google Patents.

EP0954101A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Hybrid data and clock precharging techniques in domino logic circuits minimizes charge sharing during evaluation

Assignee: Texas Instruments Inc

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Filing: 1999-04-29

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Granted: —

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Expires: 2019-04-29

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Abstract

Abstract A domino logic circuit (400) includes a precharge device (101) precharging a precharge node (110) during a precharge phase and a logic block (121, 123, 125, 127, 129) receiving plural input signals (A, B, C, D, E) to conditionally discharge the precharge node. In this improvement a second precharge device (155) precharges an intermediate node (122) when a particular input signal (E) controls its corresponding logic device to be nonconducting. The intermediate node precharged by this second precharge device may be any intermediate node including the last in a serial chain from the precharge node. This second precharge device may be used with a third precharge device (114) according to the prior art which precharges the intermediate node during the precharge phase. This domino logic circuit may be used with another precharge device (150) controlled by a second input signal (D) different from the first input signal. This additional precharge device may be used to precharge the same intermediate node or another intermediate node. If the input signal controlling the second precharge device is unconstrained, then the circuit preferably includes a clock controlled precharge device to precharge the intermediate node during the precharge phase and a discharge control device disposed between said logic block and ground preventing discharge during the precharge phase. Alternatively, the input signal may be clocked and guaranteed low during the precharge phase. In this case, the clocked precharge of the intermediate node and the discharge control device are optional.

Inventors

👤 Pranjal Srivastava
👤 Patrick W. Bosshart
👤 Uming Ko

Bibliographic Details

Application Number —

Jurisdiction EP

Data Source google_patents

Last Synchronized 2026-10-30 16:39

CPC Classifications

H; H03; H03K; H03K19/00; H03K19/02; H03K19/08; H03K19/094; H03K19/096; H03K19/0963

Claims Analysis

Total Claims: 9

Claim 1

Independent Claim 256 words

A domino logic circuit comprising: a precharge node; a first precharge device operative during a precharge phase of a clock signal to connect said precharge node to a first predetermined voltage source thereby precharging said precharge node; a logic block receiving a plurality of input signals and disposed between said precharge node and a second predetermined voltage source having a different voltage than said first predetermined voltage source, said logic block forming a conduction path between said precharge node and said second predetermined voltage source thereby discharging said precharge node when said plurality of input signals satisfy a predetermined logic condition, said logic block including a plurality of logic devices disposed in at least one serial chain defining at least one intermediate node between adjacent logic devices, each logic device receiving a corresponding input signal controlling whether said logic device conducts or does not conduct, said at least one serial chain of logic devices thereby discharging said precharge node if said input signals cause said all corresponding logic devices in said at least one serial chain to be conducting during an evaluate phase of said clock signal; a second precharge device operative when a predetermined input signal controls a corresponding logic device in said at least one serial chain to be nonconducting to connect a predetermined intermediate node to said first predetermined voltage source thereby precharging said predetermined intermediate node; a sensing circuit for sensing a voltage at said precharge node and forming different logical outputs dependent upon whether said precharge node is precharged or discharged.

Claim 2

Dependent Claim 34 words

The domino logic circuit of claim 1, wherein: said predetermined intermediate node precharged by said second precharge device is an intermediate node in said at least one serial chain nearest to said precharge node.

Claim 3

Dependent Claim 40 words

The domino logic circuit of claim 2, further comprising: a third precharge device operative during said precharge phase of said clock signal to connect said predetermined intermediate node to said first predetermined voltage source thereby precharging said predetermined intermediate node.

Claim 4

Dependent Claim 31 words

The domino logic circuit of claim 1, wherein: said predetermined intermediate node precharged by said is an intermediate node in said at least one serial chain furthest from said precharge node.

Claim 5

Dependent Claim 51 words

The domino logic circuit of claim 4, further comprising: a third precharge device operative during said precharge phase of said clock signal to connect an intermediate node in said at least one serial chain nearest to said precharge node to said first predetermined voltage source thereby precharging said nearest intermediate node.

Claim 6

Dependent Claim 52 words

The domino logic circuit of claim 1, further comprising: a third precharge device operative when a second predetermined input signal different from said predetermined input signal controls a corresponding logic device to be nonconducting to connect said predetermined intermediate node to said first predetermined voltage source thereby precharging said predetermined intermediate node.

Claim 7

Dependent Claim 60 words

The domino logic circuit of claim 1, further comprising: a third precharge device operative when a second predetermined input signal different from said predetermined input signal controls a corresponding logic device to be nonconducting to connect a second predetermined intermediate node different from said predetermined input node to said first predetermined voltage source thereby precharging said second predetermined intermediate node.

Claim 8

Dependent Claim 173 words

The domino logic circuit of claim 1, wherein: said predetermined input signal optionally controls said corresponding logic device in said at least one serial chain to be either conducting or nonconducting during said precharge phase, whereby said second precharge device either not precharge said precharge node or precharge said precharge node, respectively, during said precharge phase; said domino logic circuit further comprises a third precharge device operative during said precharge phase of said clock signal to connect an intermediate node in said at least one serial chain nearest to said precharge node to said first predetermined voltage source thereby precharging said nearest intermediate node; and said domino logic circuit further includes a discharge control device disposed between said logic block and said second predetermined voltage source operative during said precharge phase to isolate said logic block from said second predetermined voltage source thereby preventing discharge of said precharge node and operative during said evaluate phase to connect said logic block to said second predetermined voltage source thereby permitting discharge of said precharge node.

Claim 9

Dependent Claim 64 words

The domino logic circuit of claim 1, wherein: said predetermined input signal optionally controls said corresponding logic device in said at least one serial chain to be nonconducting during said precharge phase, whereby said second precharge device always precharges said precharge node during said precharge phase; said logic block is directly connected to said second predetermined voltage source without intervention of a logic device.

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