Patent EP0874393A2 successfully refreshed from Google Patents.
EP0874393A2
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Methods of forming integrated circuit capacitors having improved electrode and dielectric layer characteristics and capacitors formed thereby
Assignee: Samsung Electronics Co Ltd
•
Filing: 1998-03-27
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Granted: —
•
Expires: 2018-03-27
Abstract
Abstract Methods of forming integrated circuit capacitors include the steps of forming a lower electrode of a capacitor by forming a conductive layer pattern (e.g., silicon layer) on a semiconductor substrate and then forming a hemispherical grain (HSG) silicon surface layer of first conductivity type on the conductive layer pattern. The inclusion of a HSG silicon surface layer on an outer surface of the conductive layer pattern increases the effective surface area of the lower electrode for a given lateral dimension. The HSG silicon surface layer is also preferably sufficiently doped with first conductivity type dopants (e.g., N-type) to minimize the size of any depletion layer which may be formed in the lower electrode when the capacitor is reverse biased and thereby improve the capacitor's characteristic Cmin/Cmax ratio. A diffusion barrier layer (e.g., silicon nitride) is also formed on the lower electrode and then a dielectric layer is formed on the diffusion barrier layer. The diffusion barrier layer is preferably made of a material of sufficient thickness to prevent reaction between the dielectric layer and the lower electrode and also prevent out-diffusion of dopants from the HSG silicon surface layer to the dielectric layer. The dielectric layer is also preferably formed of a material having high dielectric strength to increase capacitance.
Inventors
- 👤 Young-Sun Kim
- 👤 Seok-Jun Won
- 👤 Young-Min Kim
- 👤 Kyung-Hoon Kim
- 👤 Kab-Jin Nam
- 👤 Young-Dae Kim
- 👤 Young-Wook Park
- 👤 Seung-Hwan Lee
- 👤 Sang-Hyeop Lee
- 👤 Se-Jin Shim
- 👤 You Chan Jin
- 👤 Ju-Tae Moon
- 👤 Jin-Seok Choi
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-09 08:52
CPC Classifications
H; H10; H10D; H10D1/00; H10D1/60; H10D1/68; H10D1/692; H10D1/711; H10D1/712; Y; Y10; Y10S; Y10S438/00; Y10S438/964
Claims Analysis
Total Claims: 52
Claim 1
Independent Claim
65 words
A method of forming an integrated circuit capacitor,
comprising the steps of: forming a conductive layer pattern on a semiconductor
substrate; forming a hemispherical grain (HSG) silicon surface layer
having a first conductivity type dopant therein, on the conductive layer
pattern; forming a dielectric layer on the HSG silicon surface layer;
and forming an electrode on the dielectric layer, opposite the
HSG silicon surface layer.
Claim 2
Dependent Claim
101 words
The method of Claim 1, wherein said step of forming a
conductive layer pattern comprises forming a conductive layer pattern
having a first concentration of first conductivity type dopants in a region
therein; and wherein said step of forming a HSG silicon surface layer
comprises the steps of forming a HSG silicon surface layer on the
conductive layer pattern and then doping the HSG silicon surface layer
with first conductivity type dopants so that the HSG silicon surface layer
has a second concentration of first conductivity type dopants therein
which is greater than the first concentration of first conductivity type
dopants.
Claim 3
Dependent Claim
34 words
The method of Claim 2, wherein said step of doping the
HSG silicon surface layer with first conductivity type dopants comprises
exposing the HSG silicon surface layer to a phosphine (PH 3 ) gas.
Claim 4
Dependent Claim
39 words
The method of Claim 2, wherein said step of forming a
HSG silicon surface layer comprises seeding an upper surface of the
conductive layer pattern with silicon seed crystals and then growing the
seed crystals into single crystal grains.
Claim 5
Dependent Claim
24 words
The method of Claim 4, wherein the conductive layer
pattern comprises a material selected from the group consisting of
amorphous silicon and polycrystalline silicon.
Claim 6
Dependent Claim
40 words
The method of Claim 2, wherein the first concentration
of first conductivity type dopants is less than about 1x10 20 cm -3 and the
second concentration of first conductivity type dopants is greater than
about 1x10 20 cm -3 .
Claim 7
Dependent Claim
54 words
The method of Claim 4, wherein the conductive layer
pattern comprises a first polycrystalline silicon layer in contact with the
semiconductor substrate and an amorphous silicon layer on the first
polycrystalline silicon layer; and wherein said growing step is followed by
the step of annealing the amorphous silicon layer and the single crystal
grains.
Claim 8
Dependent Claim
47 words
The method of Claim 1, wherein said step of forming a
HSG silicon layer is preceded by the step of cleaning the conductive layer
pattern using a cleaning solution selected from the group consisting of a
hydrofluoric acid (HF) solution and a buffered oxide etchant (BOE)
solution.
Claim 9
Dependent Claim
39 words
The method of Claim 2, wherein said step of doping the
HSG silicon surface layer comprises exposing the HSG silicon surface
layer to a dopant gas containing first conductivity type impurities therein,
in a rapid thermal processing (RTP) apparatus.
Claim 10
Dependent Claim
47 words
The method of Claim 9, wherein said step of exposing
the HSG silicon surface layer to a dopant gas in a RTP apparatus includes
ramping a temperature of the dopant gas at a first rate to a sustainment
temperature in a range between about 550 and 900°C.
Claim 11
Dependent Claim
53 words
The method of Claim 10, wherein the dopant gas
comprises phosphine (PH 3 ); and wherein said ramping step comprises
ramping a temperature of the dopant gas upward at a rate in a range
between about 1°C sec -1 and 10°C sec -1 , to inhibit degradation of the HSG
silicon surface layer.
Claim 12
Dependent Claim
32 words
The method of Claim 11, wherein said ramping step
comprises ramping a temperature of the dopant gas at a rate of about
10°C sec -1 to a sustainment temperature of about 800°C.
Claim 13
Dependent Claim
80 words
The method of Claim 10, wherein said step of exposing
the HSG silicon surface layer to a dopant gas in a RTP apparatus includes
the steps of ramping a temperature of the dopant gas upward at a first
rate to a sustainment temperature in a range between about 550 and
900°C, maintaining the temperature of the dopant gas at the sustainment
temperature for a first duration and then ramping the temperature of the
dopant gas downward at the first rate.
Claim 14
Dependent Claim
54 words
The method of Claim 13, wherein said step of exposing
the HSG silicon surface layer to a dopant gas in a RTP apparatus
comprises exposing the HSG silicon surface layer to the dopant gas while
maintaining a pressure in the RTP apparatus at a level in a range between
about 5 and 500 torr.
Claim 15
Dependent Claim
27 words
The method of Claim 14, wherein the dopant gas is
provided to the RTP apparatus at a rate in a range between about 200
and 270 sccm.
Claim 16
Dependent Claim
36 words
The method of Claim 2, wherein said step of doping the
HSG silicon surface layer comprises exposing the HSG silicon surface
layer to first conductivity type dopants in a low pressure chemical vapor
deposition (LPCVD) apparatus.
Claim 17
Dependent Claim
65 words
The method of Claim 2, wherein said step of doping the
HSG silicon surface layer comprises exposing the HSG silicon surface
layer to first conductivity type dopants in a low pressure chemical vapor
deposition (LPCVD) apparatus, while simultaneously maintaining a
pressure and a temperature in the LPCVD apparatus at a level in a range
between about 1 and 3 torr and 650 and 850°C, respectively.
Claim 18
Dependent Claim
31 words
The method of Claim 2, wherein said step of doping the
HSG silicon surface layer comprises exposing the HSG silicon surface
layer to a plasma containing first conductivity type dopants therein.
Claim 19
Dependent Claim
26 words
The method of Claim 1, wherein the dielectric layer
comprises a nitride-oxide (NO) dielectric layer having a thickness in a
range between about 40 and 70Å.
Claim 20
Dependent Claim
49 words
The method of Claim 2, wherein said step of doping the
HSG silicon surface layer is preceded by the step of cleaning the HSG
silicon surface layer with a cleaning solution selected from the group
consisting of a hydrofluoric acid (HF) solution and a buffered oxide
etchant (BOE) solution.
Claim 21
Dependent Claim
30 words
The method of Claim 1, wherein said step of forming a
dielectric layer is preceded by the step of forming a diffusion barrier layer
on the HSG silicon surface layer.
Claim 22
Dependent Claim
34 words
The method of Claim 21, wherein said step of forming
a diffusion barrier layer comprises forming an in-situ doped diffusion
barrier layer containing first conductivity type dopants therein, on the
HSG silicon surface layer.
Claim 23
Dependent Claim
29 words
The method of Claim 21, wherein said step of forming
a diffusion barrier layer comprises forming an doped or undoped layer of
silicon nitride by chemical vapor deposition (CVD).
Claim 24
Dependent Claim
32 words
The method of Claim 21, wherein said step of forming
a HSG silicon surface layer comprises exposing the HSG silicon surface
layer to a source gas containing first conductivity type dopants therein.
Claim 25
Dependent Claim
30 words
The method of Claim 21, wherein said step of forming
a dielectric layer comprises forming a layer of tantalum oxide (Ta 2 O 5 ) on
the diffusion barrier layer.
Claim 26
Dependent Claim
26 words
The method of Claim 25, wherein said step of forming
a diffusion barrier layer comprises forming a silicon nitride layer on the
HSG silicon surface layer.
Claim 27
Dependent Claim
46 words
The method of Claim 26, wherein the silicon nitride
layer comprises a first silicon nitride layer formed by rapid thermal
nitridation (RTN), on the HSG silicon surface layer, and a second silicon
nitride layer formed by chemical vapor deposition (CVD), on the first
silicon nitride layer.
Claim 28
Dependent Claim
29 words
The method of Claim 21, wherein said step of forming
an electrode on the dielectric layer is preceded by the step of exposing
the dielectric layer to dry oxygen.
Claim 29
Dependent Claim
40 words
The method of Claim 22, wherein said step of forming
a diffusion barrier layer comprises exposing the HSG silicon surface layer
to a reactive source gas containing nitrogen and a dopant source gas
containing dopant impurities of first conductivity type.
Claim 30
Dependent Claim
46 words
The method of Claim 22, wherein said step of forming
a diffusion barrier layer comprises exposing the HSG silicon surface layer
to a first source gas containing silicon, a second source gas containing
nitrogen and a dopant source gas containing dopant impurities of first
conductivity type.
Claim 31
Dependent Claim
51 words
The method of Claim 21, wherein said step of forming
a diffusion barrier layer comprises forming a first silicon nitride layer by
rapid thermal nitridation (RTN), on the HSG silicon surface layer, and then
forming a second silicon nitride layer by chemical vapor deposition (CVD),
on the first silicon nitride layer.
Claim 32
Dependent Claim
89 words
The method of Claim 26, wherein said step of forming
a layer of tantalum oxide (Ta 2 O 5 ) on the diffusion barrier layer comprises
the steps of forming a first tantalum oxide layer on the diffusion barrier
layer, densifying the first tantalum oxide layer by exposing the first
tantalum oxide layer to ultra-violet radiation in an ozone ambient, forming
a second tantalum oxide layer on the first tantalum oxide layer and then
densifying the second tantalum oxide layer by exposing the second
tantalum oxide layer to oxygen.
Claim 33
Dependent Claim
52 words
The method of Claim 26, wherein said step of forming
a layer of tantalum oxide (Ta 2 O 5 ) on the diffusion barrier layer comprises
the steps of forming a tantalum oxide layer on the diffusion barrier layer
and then annealing the tantalum oxide layer in a N 2 O ambient.
Claim 34
Dependent Claim
127 words
The method of Claim 1, wherein said step of forming a
conductive layer pattern comprises forming a conductive layer pattern
having a first concentration of first conductivity type dopants in a region
therein; wherein said step of forming a HSG silicon surface layer
comprises the steps of forming an undoped HSG silicon surface layer on
the conductive layer pattern and then doping the HSG silicon surface
layer with first conductivity type dopants so that the HSG silicon surface
layer has a second concentration of first conductivity type dopants
therein which is greater than the first concentration of first conductivity
type dopants; and wherein said step of forming a dielectric layer is
preceded by the step of forming a diffusion barrier layer on the HSG
silicon surface layer.
Claim 35
Dependent Claim
34 words
The method of Claim 34, wherein said step of forming
a diffusion barrier layer comprises forming an in-situ doped diffusion
barrier layer containing first conductivity type dopants therein, on the
HSG silicon surface layer.
Claim 36
Dependent Claim
29 words
The method of Claim 34, wherein said step of forming
a diffusion barrier layer comprises forming a layer of doped or undoped
silicon nitride by chemical vapor deposition (CVD).
Claim 37
Dependent Claim
30 words
The method of Claim 35, wherein said step of forming
a dielectric layer comprises forming a layer of tantalum oxide (Ta 2 O 5 ) on
the diffusion barrier layer.
Claim 38
Dependent Claim
46 words
The method of Claim 37, wherein the diffusion barrier
layer comprises a first silicon nitride layer formed by rapid thermal
nitridation (RTN), on the HSG silicon surface layer, and a second silicon
nitride layer formed by chemical vapor deposition (CVD), on the first
silicon nitride layer.
Claim 39
Dependent Claim
21 words
The method of Claim 37, wherein the diffusion barrier
layer comprises a silicon nitride layer formed by chemical vapor deposition
(CVD).
Claim 40
Dependent Claim
70 words
The method of Claim 26, wherein said step of forming
a layer of tantalum oxide (Ta 2 O 5 ) on the diffusion barrier layer comprises
the steps of: forming a first tantalum oxide layer on the diffusion barrier
layer; exposing the first tantalum oxide layer to ultra-violet
radiation; then forming a second tantalum oxide layer on the first tantalum
oxide layer; and then densifying the second tantalum oxide layer.
Claim 41
Independent Claim
128 words
A method of forming an integrated circuit capacitor,
comprising the steps of: forming an amorphous silicon conductive layer pattern having
a first concentration of first conductivity type dopants therein, on a
semiconductor substrate; forming a hemispherical grain (HSG) silicon surface layer, on
the amorphous silicon conductive layer pattern; converting the amorphous silicon conductive layer pattern to
polycrystalline silicon; doping the HSG silicon surface layer with first conductivity
type dopants so that a concentration of first conductivity type dopants
in the HSG silicon layer is greater than the first concentration; forming a diffusion barrier layer on the HSG silicon surface
layer; forming a dielectric layer on the diffusion barrier layer,
opposite the HSG silicon surface layer; and forming an electrode on the dielectric layer, opposite the
diffusion barrier layer.
Claim 42
Dependent Claim
46 words
The method of Claim 41, wherein said step of forming
a diffusion barrier layer comprises forming a silicon nitride layer on the
HSG silicon layer; and wherein said step of forming a dielectric layer
comprises forming a layer of tantalum oxide on the silicon nitride layer.
Claim 43
Dependent Claim
29 words
The method of Claim 42, wherein said step of forming
a silicon nitride layer comprises forming an in-situ doped silicon nitride
layer containing dopants of first conductivity type therein.
Claim 44
Dependent Claim
36 words
The method of Claim 43, wherein the silicon nitride
layer comprises a composite of a first silicon nitride layer formed by rapid
thermal nitridation (RTN) and a second nitride layer formed by chemical
vapor deposition (CVD).
Claim 45
Dependent Claim
36 words
The method of Claim 42, wherein the silicon nitride
layer comprises a composite of a first silicon nitride layer formed by rapid
thermal nitridation (RTN) and a second nitride layer formed by chemical
vapor deposition (CVD).
Claim 46
Dependent Claim
15 words
The method of Claim 45, further comprising the step of
densifying the tantalum oxide layer.
Claim 47
Dependent Claim
31 words
The method of Claim 46, wherein said densifying step
comprises exposing the tantalum oxide layer to dry oxygen gas,
ultraviolet radiation in an ozone ambient or an N 2 O ambient.
Claim 48
Dependent Claim
29 words
The method of Claim 42, wherein said step of forming
a dielectric layer is preceded by the step of performing rapid thermal
oxidation (RTO) of the diffusion barrier layer.
Claim 49
Dependent Claim
96 words
An integrated circuit capacitor, comprising: a first capacitor electrode on a semiconductor substrate, said
first capacitor electrode comprising a recrystallized amorphous silicon
layer having a first concentration of first conductivity type dopants
therein, and a hemispherical grain (HSG) silicon surface layer on the
recrystallized amorphous silicon layer, said HSG silicon surface layer
having a second concentration of first conductivity type dopants therein
which is greater than the first concentration; a diffusion barrier layer on the HSG silicon surface layer; a dielectric layer on the diffusion barrier layer; and a second capacitor electrode on the dielectric layer.
Claim 50
Dependent Claim
31 words
The integrated circuit capacitor of Claim 49, wherein
the diffusion barrier layer comprises a silicon nitride layer having first
conductivity type dopants therein; and wherein the dielectric layer
comprises tantalum oxide.
Claim 51
Dependent Claim
39 words
The integrated circuit capacitor of Claim 50, wherein
the silicon nitride layer comprises a composite of a first silicon nitride
layer formed by rapid thermal nitridation (RTN) and a second silicon nitride
layer formed by chemical vapor deposition (CVD).
Claim 52
Dependent Claim
23 words
The integrated circuit capacitor of Claim 50, wherein
the tantalum oxide layer comprises a composite of a plurality of densified
tantalum oxide layers.
References Cited (Backward Citations)
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