Patent EP0865046A2 successfully refreshed from Google Patents.
← Back to Patent Explorer
EP0865046A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Analog signal recording and playback integrated circuit and message management system

Assignee: Winbond Electronics Corp
•
Filing: 1998-02-25
•
Granted: —
•
Expires: 2018-02-25
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract An apparatus and method for message management using nonvolatile analog signal recording and playback is disclosed. The device is an integrated circuit with interface circuitry for use as a peripheral device to a microcontroller or a microprocessor-based system. The integrated circuit is complete with differential analog inputs, auto attenuation to improve signal quality, filter, fixed references including a band gap reference, trimming, memory array, multiple closed loop sample and hold circuits, column device, row decoder, address counters, master oscillator, chip function timing circuits, and a serial peripheral interface (SPI) and circuits on a single chip. The integrated circuit is interfaced with a host microcontroller through the SPI. The host microcontroller can send a number of commands to the integrated circuit through the SPI for efficient message management. These commands include the basic commands to record or playback and various addressing and message cueing options. The system utilizes redundancy to increase production yield. It also utilizes a high speed test mode to reduce production testing time. <IMAGE>

Inventors

  • 👤 Hieu Van Tran
  • 👤 Nataraj S. Bindiganavale
  • 👤 Anthony Dunne
  • 👤 Boyce W. Jarrett

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-09 17:07
CPC Classifications
G; G06; G06F; G06F3/00; G11; G11C; G11C27/00; G11C27/005; G11C29/00; G11C29/04; G11C29/08; G11C29/12; G11C29/44

Claims Analysis

Total Claims: 10
Claim 1
Independent Claim 91 words
A nonvolatile integrated circuit analog storage device having the capability of receiving, repetitively sampling, storing and reproducing an analog input signal comprising: a first circuit for sampling an analog signal; a plurality of analog storage cells coupled to the first circuit, for storing samples of the analog signal; and a second circuit for reading out the stored samples of the analog signal to reconstruct the analog signal, the second circuit including an attenuator for attenuating noise in the reconstructed analog signal when the reconstructed analog signal is below a predetermined threshold.
Claim 2
Dependent Claim 50 words
The device of claim 1, further comprising: an interface circuit coupled to the first circuit, the second circuit and the plurality of analog storage cells; and a microcontroller coupled to the interface circuit for controlling the sampling and storage of the analog signal and the reading of the stored samples.
Claim 3
Dependent Claim 26 words
The device of claim 2, wherein the microcontroller provides a clock signal for synchronizing data transfer into the first circuit and out of the second circuit.
Claim 4
Dependent Claim 112 words
The device of claim 2, wherein the interface circuit comprises: an input shift register for receiving control and address information from the microcontroller; a logic circuit coupled to the input shift register for receiving the control information, the logic circuit generating an output signal in response to the control information; an address circuit coupled to the input shift register and to the logic circuit receiving the address information from the input shift register in response to the output signal; and an output shift register coupled to the logic circuit and to the address circuit, the address circuit providing the address information to the output shift register in response to the output signal.
Claim 5
Dependent Claim 43 words
The nonvolatile integrated circuit analog storage device of claim 1, wherein in a high speed read mode, the second circuit reads the stored samples, compares each stored sample with a reference voltage, and shifts out the result of the comparisons at high speed.
Claim 6
Independent Claim 68 words
A method of recording and playback of messages of varying length, comprising the steps of: (a) sampling an analog signal; (b) storing samples of the analog signal in a plurality of analog storage cells; (c) reading out the stored samples of the analog signal to reconstruct the analog signal; and (d) attenuating noise in the reconstructed analog signal when the reconstructed analog signal is below a predetermined threshold.
Claim 7
Dependent Claim 29 words
The method of Claim 6, further comprising the step of providing a microcontroller for controlling the sampling of the analog signal and the reading out of the stored samples.
Claim 8
Dependent Claim 26 words
The method of claim 7, wherein the microcontroller provides a clock signal for synchronizing sampling of the analog signal and reading out of the stored samples.
Claim 9
Dependent Claim 116 words
The method of claim 7, further comprising the steps of: providing an input shift register for receiving control and address information from the microcontroller; providing a logic circuit coupled to the input shift register for receiving the control information, the logic circuit generating an output signal in response to the control information; providing an address circuit coupled to the input shift register and to the logic circuit receiving the address information from the input shift register in response to the output signal; and providing an output shift register coupled to the logic circuit and to the address circuit, the address circuit providing the address information to the output shift register in response to the output signal.
Claim 10
Dependent Claim 49 words
The method of claim 6, wherein step (c) comprises the steps of: (c.1) reading the stored samples during a high speed read mode; (c.2) comparing each stored sample with a reference voltage; and (c.3) shifting out the result of the comparisons at high speed to reconstruct the analog signal.

References Cited (Backward Citations)

No citation records indexed.

USPTO Annuity & Maintenance Windows

Maintenance schedule is calculated for granted US utility patents.

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag