Patent EP0834823A1 successfully refreshed from Google Patents.
EP0834823A1
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EP
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Method and apparatus for efficiently implementing complex function blocks in integrated circuit designs
Assignee: Philips Semiconductors Inc
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Filing: 1997-08-22
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Granted: —
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Expires: 2017-08-22
Abstract
Abstract A method in accordance with the present invention for developing an integrated circuit design using a compilation tool includes: (A) developing at least one HDL template by: (a) creating the HDL template; (b) creating a parameter file and a parameter check file for the HDL template; and (c) encrypting the HDL template; (B) developing design specifications for use in creating HDL for synthesis and for use in compiling one or more macro blocks; (C) creating the HDL for synthesis; and (D) creating netlists for at least one macro block instantiated in the HDL template using the design specifications. A development tool of the present invention implements the method on a computer system to form a portion of an integrated circuit fabrication system.
Inventors
- 👤 Kenneth A. Dockser
- 👤 Gregory E. Ehmann
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-08 01:53
CPC Classifications
G; G06; G06F; G06F30/00; G06F30/30
Claims Analysis
Total Claims: 32
Claim 1
Independent Claim
79 words
A method for developing an integrated circuit design using a compilation
tool, said method comprising: (A) developing at least one HDL template by: (a) creating said HDL template; and (b) creating a parameter file and a parameter check file for said
HDL template; (B) developing design specifications for use in creating HDL for
synthesis; (C) creating said HDL for synthesis; and (D) creating a netlist for at least one macro block using said design
specifications and said HDL template.
Claim 2
Dependent Claim
21 words
A method as recited in claim 1 further comprising : synthesizing said netlist; and creating a layout using said synthesized netlist.
Claim 3
Dependent Claim
24 words
A method as recited in claim 1 wherein said HDL created for synthesis
instantiates at least one macro block not defined in said HDL.
Claim 4
Dependent Claim
31 words
A method as recited in claim 1 wherein said creating said netlist for said
macro block involves compiling said macro block directly into a target library based
on said design specifications.
Claim 5
Dependent Claim
29 words
A method as recited in claim 1 wherein said HDL for synthesis is created
from said design specifications upon user input of a password related to said design
specifications.
Claim 6
Dependent Claim
38 words
A method as recited in claim 1 wherein said developing said design
specifications involves building a menu using information contained in said
parameter file and displaying said menu, said menu being arranged to receive input
from a user.
Claim 7
Dependent Claim
32 words
A method as recited in claim 6 wherein said developing said design
specifications further includes checking ranges of parameters contained in said
parameter file using information contained in said parameter check file.
Claim 8
Dependent Claim
26 words
A method as recited in claim 7 wherein said developing said design
specifications further involves determining an appropriate macro for use in meeting
said design specifications.
Claim 9
Dependent Claim
26 words
A method as recited in claim 8 wherein said determining said appropriate
macro involves using said parameter file to create a plurality of desired option sets.
Claim 10
Dependent Claim
30 words
A method as recited in claim 9 wherein said developing said design
specifications further involves compiling said macro using an option set selected
from said plurality of desired option sets.
Claim 11
Dependent Claim
30 words
A method as recited in claim 1 wherein said creating said HDL for synthesis
includes: encrypting said HDL template; decrypting said encrypted HDL template; and executing said decrypted HDL template.
Claim 12
Dependent Claim
20 words
A method as recited in claim 11 wherein said executing said decrypted HDL
template includes calling a second HDL template.
Claim 13
Dependent Claim
32 words
A method as recited in claim 11 further comprising: decrypting at least one subordinate encrypted HDL template which is called by
said decrypted HDL template; and executing said decrypted subordinate HDL template.
Claim 14
Dependent Claim
23 words
A method as recited in claim 13 wherein said calling said subordinate HDL
template includes a recursive call to said decrypted HDL template.
Claim 15
Dependent Claim
19 words
A method as recited in claim 1 further comprising creating at least one mask
for said integrated circuit design.
Claim 16
Dependent Claim
14 words
An integrated circuit formed in accordance with the method as recited in
claim 15.
Claim 17
Independent Claim
92 words
A method for designing an integrated circuit using a compilation tool, said
method comprising: (A) developing a plurality of HDL templates by: (a) creating said plurality of HDL templates to serve different
functions; and (b) creating a plurality of parameter files and a plurality of
parameter check files for said plurality of HDL templates; (B) developing design specifications for use in creating HDL for
synthesis; (C) creating said HDL for synthesis; and (D) creating a netlist for at least one macro block using said design
specifications and said plurality of HDL templates.
Claim 18
Dependent Claim
34 words
A method as recited in claim 17 wherein said plurality of HDL templates
includes at least one top-level template and one lower-level template, wherein said
top-level template is arranged to call said lower-level template.
Claim 19
Dependent Claim
33 words
A method as recited in claim 18 wherein said plurality of parameter files
includes a first parameter file associated with said top-level template and a second
parameter file associated with said lower-level template.
Claim 20
Dependent Claim
21 words
A method as recited in claim 19 wherein said first parameter file is used to
create at least one option set.
Claim 21
Dependent Claim
22 words
A method as recited in claim 20 wherein a first macro instantiated in said
top-level template is compiled with said option set.
Claim 22
Dependent Claim
47 words
A method as recited in claim 18 wherein said creating HDL for synthesis
further includes: encrypting said top-level template; encrypting said lower-level template; decrypting said top-level template; decrypting said lower-level template; and executing said top-level template, wherein said top-level template is
arranged to execute said lower-level template.
Claim 23
Dependent Claim
16 words
A method as recited in claim 17 further comprising verifying functionality
and performance of said netlist.
Claim 24
Dependent Claim
86 words
An integrated circuit design tool comprising: a computer system including a central processing unit (CPU) and memory
coupled to said CPU; means for obtaining at least one HDL template, at least one parameter file,
and at least one parameter check file for use in developing design specifications for
an integrated circuit design; means for developing said design specifications; means for creating HDL for synthesis using said design specifications and
said HDL template; and means for creating a netlist using said design specifications and said HDL
template.
Claim 25
Dependent Claim
45 words
An integrated circuit design tool as described in claim 24 wherein said
means for developing said design specifications includes means for building a menu
using information contained in said parameter file and displaying said menu, said
menu being arranged to receive input from a user.
Claim 26
Dependent Claim
39 words
An integrated circuit design tool as described in claim 25 wherein said
means for developing said design specifications further includes means for checking ranges of parameters contained in said parameter file
using information contained in said parameter check file.
Claim 27
Dependent Claim
33 words
An integrated circuit design tool as described in claim 26 wherein said
means for developing said design specifications further includes means for
determining an appropriate macro for use in meeting said design specifications.
Claim 28
Dependent Claim
33 words
An integrated circuit design tool as described in claim 27 wherein said
means for determining said appropriate macro includes means for using said
parameter file to create a plurality of desired option sets.
Claim 29
Dependent Claim
36 words
An integrated circuit design tool as described claim 28 wherein said means
for developing said design specifications further includes means for compiling said
macro using an option set selected from said plurality of desired option sets.
Claim 30
Dependent Claim
41 words
An integrated circuit design tool as described in claim 24 wherein said
means for creating said HDL for synthesis includes: means for encrypting said HDL template; means for decrypting said encrypted HDL template; and means for executing said decrypted HDL template.
Claim 31
Dependent Claim
39 words
An integrated circuit design tool as described in claim 30 further including: means for decrypting at least one subordinate encrypted HDL template which is
called by said decrypted HDL template; and means for executing said decrypted subordinate HDL template.
Claim 32
Dependent Claim
24 words
An integrated circuit design tool as described in claim 24 further including
means for creating at least one mask for said integrated circuit design.
References Cited (Backward Citations)
US5548539A
Cited
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