Device for and method of coding/decoding image information

Claim 2

The device as defined in claim 1, wherein the boundary block merge section merges a plurality of boundary blocks.

Claim 3

The device as defined in claim 1, wherein the boundary section merge section merges a plurality of sub blocks constituting the boundary blocks.

Claim 4

The device as defined in claim 1, wherein the boundary section merge section merges luminance blocks.

Claim 5

The device as defined in claim 1, wherein the boundary section merge section merges chrominance blocks.

Claim 6

The device as defined in claim 1, wherein the boundary section merge block merges the luminance and chrominance blocks in separate groups.

Claim 7

The device as defined in claim 1, wherein the variable length coding section codes the boundary blocks by using the variable length coding tables being different in the number of coding bits according to the number of object blocks, including the object image, out of a plurality of sub blocks constituting the boundary blocks.

Claim 8

The device as defined in claim 1, wherein the variable length coding tables stored in the variable length coding table memory are differently constructed according to the arrangement characteristics of object blocks, including the object image, out of a plurality of sub blocks constituting the boundary blocks.

Claim 9

The device as defined in claim 8, wherein the variable length coding tables according to the arrangement characteristics of the object blocks have bits that are gradually increased in number with less frequency of occurrence for each arrangement characteristic.

Claim 11

The device as defined in claim 10, wherein the variable length coding section codes the boundary blocks by using the variable length coding tables being different in the number of coding bits according to the number of object blocks, including the object image, out of a plurality of sub blocks constituting the boundary blocks.

Claim 12

The device as defined in claim 10, wherein the variable length coding tables stored in the variable length coding table memory are differently constructed according to the arrangement characteristics of object blocks, including the object image, out of a plurality of sub blocks constituting the boundary blocks.

Claim 13

The device as defined in claim 12, wherein the variable length coding tables according to the arrangement characteristics of the object blocks have bits that are gradually increased in number with less frequency of occurrence for each arrangement characteristic.

Claim 14

The device as defined in claim 10, wherein the variable length coding tables, where after the boundary blocks of (N×N) size comprising the sub blocks of (N/2×N/2) size are merged by a boundary block merge technique, four object blocks include the object image and they are intra blocks, the object blocks are termed first to fourth object blocks, each object block having other information than a DC component is represented by "1" and each object block having no other information than the DC component is represented by "0", and the first to fourth object blocks, all in four bits, are sequentially arranged from the left side hand, use four bits to construct a variable length code if the four object blocks are represented by "0000", and use five bits to construct a variable length code if the four object blocks are represented by "0001", use five bits to construct a variable length code if the four object blocks are represented by "0010", use four bits to construct a variable length code if the four object blocks are represented by "0011", use five bits to construct a variable length code if the four object blocks are represented by "0100", use four bits to construct a variable length code if the four object blocks are represented by "0101", use six bits to construct a variable length code if the four object blocks are represented by "0110", use four bits to construct a variable length code if the four object blocks are represented by "0111", use five bits to construct a variable length code if the four object blocks are represented by "1000", use six bits to construct a variable length code if the four object blocks are represented by "1001", use four bits to construct a variable length code if the four object blocks are represented by "1010", use four bits to construct a variable length code if the four object blocks are represented by "1011", use four bits to construct a variable length code if the four object blocks are represented by "1100", use four bits to construct a variable length code if the four object blocks are represented by "1101", use four bits to construct a variable length code if the four object blocks are represented by "1110", use two bits to construct the variable length code if the four object blocks are represented by "1111".

Claim 15

The device as defined in claim 10, wherein the variable length coding tables, where after the boundary blocks of (N×N) size comprising the sub blocks of (N/2×N/2) size are merged by a boundary block merge technique, four object blocks include the object image and they are intra blocks, the object blocks are termed first to fourth object blocks, each object block having other information than a DC component is represented by "1" and each object block having no other information than the DC component is represented by "0", and the first to fourth object blocks, all in four bits, are sequentially arranged from the left side hand, set "0011" for a variable length code if the four object blocks are represented by "0000", and set "00101" for a variable length code if the four object blocks are represented by "0001", set "00100" for a variable length code if the four object blocks are represented by "0010", set "1001" for a variable length code if the four object blocks are represented by "0011", set "00011" for a variable length code if the four object blocks are represented by "0100", set "0111" for a variable length code if the four object blocks are represented by "0101", set "000010" for a variable length code if the four object blocks are represented by "0110", set "1011" for a variable length code if the four object blocks are represented by "0111", set "00010" for a variable length code if the four object blocks are represented by "1000", set "000011" for a variable length code if the four object blocks are represented by "1001", set "0101" for a variable length code if the four object blocks are represented by "1010", set "1010" for a variable length code if the four object blocks are represented by "1011", set "0100" for a variable length code if the four object blocks are represented by "1100", set "1000" for a variable length code if the four object blocks are represented by "1101", set "0110" for a variable length code if the four object blocks are represented by "1110", set "11" for the variable length code if the four object blocks are represented by "1111".

Claim 16

The device as defined in claim 10, wherein the variable length coding tables, where after the boundary blocks of (N×N) size comprising the sub blocks of (N/2×N/2) size are merged by a boundary block merge technique, four object blocks include the object image and they are inter blocks or sprite blocks, the object blocks are termed first to fourth object blocks, each object block having other information than a DC component is represented by "1" and each object block having no other information than the DC component is represented by "0", and the first to fourth object blocks, all in four bits, are sequentially arranged from the left side hand, use four bits to construct a variable length code if the four object blocks are represented by "1111", and use five bits to construct a variable length code if the four object blocks are represented by "1110", use five bits to construct a variable length code if the four object blocks are represented by "1101", use four bits to construct a variable length code if the four object blocks are represented by "1100", use five bits to construct a variable length code if the four object blocks are represented by "1011", use four bits to construct a variable length code if the four object blocks are represented by "1010", use six bits to construct a variable length code if the four object blocks are represented by "1001", use four bits to construct a variable length code if the four object blocks are represented by "1000", use five bits to construct a variable length code if the four object blocks are represented by "0111", use six bits to construct a variable length code if the four object blocks are represented by "0110", use four bits to construct a variable length code if the four object blocks are represented by "0101", use four bits to construct a variable length code if the four object blocks are represented by "0100", use four bits to construct a variable length code if the four object blocks are represented by "0011", use four bits to construct a variable length code if the four object blocks are represented by "0010", use four bits to construct a variable length code if the four object blocks are represented by "0001", use two bits to construct the variable length code if the four object blocks are represented by "0000".

Claim 17

The device as defined in claim 10, wherein the variable length coding tables, where after the boundary blocks of (N×N) size comprising the sub blocks of (N/2×N/2) size are merged by a boundary block merge technique, four object blocks include the object image and they are inter blocks or sprite blocks, the object blocks are termed first to fourth object blocks, each object block having other information than a DC component is represented by "1" and each object block having no other information than the DC component is represented by "0", and the first to fourth object blocks, all in four bits, are sequentially arranged from the left side hand, set "0011" for a variable length code if the four object blocks are represented by "1111", and set "00101" for a variable length code if the four object blocks are represented by "1110", set "00100" for a variable length code if the four object blocks are represented by "1101", set "1001" for a variable length code if the four object blocks are represented by "1100", set "00011" for a variable length code if the four object blocks are represented by "1011", set "0111" for a variable length code if the four object blocks are represented by "1010", set "000010" for a variable length code if the four object blocks are represented by "1001", set "1011" for a variable length code if the four object blocks are represented by "1000", set "00010" for a variable length code if the four object blocks are represented by "0111", set "000011" for a variable length code if the four object blocks are represented by "0110", set "0101" for a variable length code if the four object blocks are represented by "0101", set "1010" for a variable length code if the four object blocks are represented by "0100", set "0100" for a variable length code if the four object blocks are represented by "0011", set "1000" for a variable length code if the four object blocks are represented by "0010", set "0110" for a variable length code if the four object blocks are represented by "0001", set "11" for the variable length code if the four object blocks are represented by "0000".

Claim 18

The device as defined in claim 10, wherein the variable length coding tables, where after the boundary blocks of (N×N) size comprising the sub blocks of (N/2×N/2) size are merged by a boundary block merge technique, three object blocks include the object image and they are intra blocks, the object blocks are termed first to third object blocks, each object block having other information than a DC component is represented by "1" and each object block having no other information than the DC component is represented by "0", and the first to third object blocks, all in three bits, are sequentially arranged from the left side hand, use three bits to construct a variable length code if the three object blocks are represented by "000", and use five bits to construct a variable length code if the three object blocks are represented by "001", use five bits to construct a variable length code if the three object blocks are represented by "010", use three bits to construct a variable length code if the three object blocks are represented by "011", use five bits to construct a variable length code if the three object blocks are represented by "100", use five bits to construct a variable length code if the three object blocks are represented by "101", use three bits to construct a variable length code if the three object blocks are represented by "110", use one bits to construct a variable length code if the three object blocks are represented by "111",

Claim 19

The device as defined in claim 10, wherein the variable length coding tables, where after the boundary blocks of (N×N) size comprising the sub blocks of (N/2×N/2) size are merged by a boundary block merge technique, three object blocks include the object image and they are intra blocks, the object blocks are termed first to third object blocks, each object block having other information than a DC component is represented by "1" and each object block having no other information than the DC component is represented by "0", and the first to third object blocks, all in three bits, are sequentially arranged from the left side hand, set "100" for a variable length code if the three object blocks are represented by "000", and set "11111" for a variable length code if the three object blocks are represented by "001", set "11110" for a variable length code if the three object blocks are represented by "010", set "101" for a variable length code if the three object blocks are represented by "011", set "11101" for a variable length code if the three object blocks are represented by "100", set "11100" for a variable length code if the three object blocks are represented by "101", set "110" for a variable length code if the three object blocks are represented by "110", set "0" for a variable length code if the three object blocks are represented by "111".

Claim 20

The device as defined in claim 10, wherein the variable length coding tables, where after the boundary blocks of (N×N) size comprising the sub blocks of (N/2×N/2) size are merged by a boundary block merge technique, three object blocks include the object image and they are inter blocks or sprite blocks, the object blocks are termed first to three object blocks, each object block having other information than a DC component is represented by "1" and each object block having no other information than the DC component is represented by "0", and the first to third object blocks, all in three bits, are sequentially arranged from the left side hand, use three bits to construct a variable length code if the three object blocks are represented by "111", and use five bits to construct a variable length code if the three object blocks are represented by "110", use five bits to construct a variable length code if the three object blocks are represented by "101", use three bits to construct a variable length code if the three object blocks are represented by "100", use live bits to construct a variable length code if the three object blocks are represented by "011", use five bits to construct a variable length code if the three object blocks are represented by "010", use three bits to construct a variable length code if the three object blocks are represented by "001", use one bits to construct a variable length code if the three object blocks are represented by "000".

Claim 21

The device as defined in claim 10, wherein the variable length coding tables, where after the boundary blocks of (N×N) size comprising the sub blocks of (N/2×N/2) size are merged by a boundary block merge technique, three object blocks include the object image and they are inter blocks or sprite blocks, the object blocks are termed first to third object blocks, each object block having other information than a DC component is represented by "1" and each object block having no other information than the DC component is represented by "0", and the first to third object blocks, all in three bits, are sequentially arranged from the left side hand, set "100" for a variable length code if the three object blocks are represented by "111", set "11111" for a variable length code if the three object blocks are represented by "110", set "11110" for a variable length code if the three object blocks are represented by "101", set "101" for a variable length code if the three object blocks are represented by "100", set "11101" for a variable length code if the three object blocks are represented by "011", set "11100" for a variable length code if the three object blocks are represented by "010", set "110" for a variable length code if the three object blocks are represented by "001", set "0" for the variable length code if the three object blocks are represented by "000".

Claim 22

The device as defined in claim 10, wherein the variable length coding tables, where after the boundary blocks of (N×N) size comprising the sub blocks of (N/2×N/2) size are merged by a boundary block merge technique, two object blocks include the object image and they are intra blocks, the object blocks are termed first to second object blocks, each object block having other information than a DC component is represented by "1" and each object block having no other information than the DC component is represented by "0", and the first to second object blocks, all in two bits, are sequentially arranged from the left side hand, use three bits to construct a variable length code if the two object blocks are represented by "00", use three bits to construct a variable length code if the two object blocks are represented by "01", use two bits to construct a variable length code if the two object blocks are represented by "10", use one bit to construct a variable length code if the two object blocks are represented by "11".

Claim 23

The device as defined in claim 10, wherein the variable length coding tables, where after the boundary blocks of (N×N) size comprising the sub blocks of (N/2×N/2) size are merged by a boundary block merge technique, two object blocks include the object image and they are intra blocks, the object blocks are termed first to second object blocks, each object block having other information than a DC component is represented by "1" and each object block having no other information than the DC component is represented by "0", and the first to second object blocks, all in two bits, are sequentially arranged from the left side hand, set "111" for a variable length code if the two object blocks are represented by "00", set "110" for a variable length code if the two object blocks are represented by "01", set "10" for a variable length code if the two object blocks are represented by "10", set "0" for the variable length code if the two object blocks are represented by "11".

Claim 24

The device as defined in claim 10, wherein the variable length coding tables, where after the boundary blocks of (N×N) size comprising the sub blocks of (N/2×N/2) size are merged by a boundary block merge technique, two object blocks include the object image and they are inter blocks or sprite blocks, the object blocks are termed first to second object blocks, each object block having other information than a DC component is represented by "1" and each object block having no other information than the DC component is represented by "0", and the first to second object blocks, all in two bits, are sequentially arranged from the left side hand, use three bits to construct a variable length code if the two object blocks are represented by "11", and use three bits to construct a variable length code if the two object blocks are represented by "10", use two bits to construct a variable length code if the two object blocks are represented by "01", use one bit to construct a variable length code if the two object blocks are represented by "00".

Claim 25

The device as defined in claim 10, wherein the variable length coding tables, where after the boundary blocks of (N×N) size comprising the sub blocks of (N/2×N/2) size are merged by a boundary block merge technique, two object blocks include the object image and they are inter blocks or sprite blocks, the object blocks are termed first to second object blocks, each object block having other information than a DC component is represented by "1" and each object block having no other information than the DC component is represented by "0", and the first to second object blocks, all in two bits, are sequentially arranged from the left side hand, set "111" for a variable length code if the two object blocks are represented by "11", set "110" for a variable length code if the two object blocks are represented by "10", set "10" for a variable length code if the two object blocks are represented by "01", set "0" for the variable length code if the two object blocks are represented by "00".

Claim 26

The device as defined in claim 10, wherein the variable length coding tables, where after the boundary blocks of (N×N) size comprising the sub blocks of (N/2×N/2) size are merged by a boundary block merge technique, one object block includes the object image and it is an intra block, the object block having other information than a DC component is represented by "1", and the object block having no other information than the DC component is represented by "0", use a 1-bit variable length code to construct the state of the object block.

Claim 27

The device as defined in claim 10, wherein the variable length coding tables, where after the boundary blocks of (N×N) size comprising the sub blocks of (N/2×N/2) size are merged by a boundary block merge technique, one object block includes the object image and it is an intra block, the object block having other information than a DC component is represented by "1", and the object block having no other information than the DC component is represented by "0", have "1" for a variable length code when the state of the object block is "0", and "0" for the variable length code when the state of the object block is "1".

Claim 28

The device as defined in claim 10, wherein the variable length coding tables, where after the boundary blocks of (N×N) size comprising the sub blocks of (N/2×N/2) size are merged by a boundary block merge technique, one object block includes the object image and it is an inter block or sprite block, the object block having other information than a DC component is represented by "1", and the object block having no other information than the DC component is represented by "0", use a 1-bit variable length code to construct the state of the object block.

Claim 29

The device as defined in claim 10, wherein the variable length coding tables, where after the boundary blocks of (N×N) size comprising the sub blocks of (N/2×N/2) size are merged by a boundary block merge technique, one object block includes the object image and it is an inter block or sprite block, the object block having other information than a DC component is represented by "1", and the object block having no other information than the DC component is represented by "0", have "1" for a variable length code when the state of the object block is "0", and "0" for the variable length code when the state of the object block is "1".

Claim 33

The device as defined in claim 32, wherein the unit blocks are video object planes.

Claim 34

The device as defined in claim 32, wherein the texture coding section, comprising: a boundary block padding section receiving the image signal, or an image error signal and the original shape information, and determining the region having no object image as a value or zero by using the mean value of the region having the object image and low-frequency filtering, in sub blocks constituting boundary blocks including the object and background images; a boundary block merge section for merging the boundary blocks out of the shape information transferred from the boundary block padding section by using a boundary block merge technique, and generating the image signal concerning the merged boundary blocks, and merge information; a discrete cosine transformer for discrete-cosine-transforming the image signal concerning the boundary blocks merged by the boundary block merge section; a quantization section for quantizing the transformed coefficient transferred from the discrete cosine transformer; a transformed coefficient and coded block pattern coding section for variable-length-coding the quantized coefficient transferred from the quantization section, and coding texture information by using the merge information transferred from the boundary block merge section; an inverse quantization section for inverse-quantizing the transformed coefficient quantized by the quantization section, and extracting the transformed coefficient; an inverse discrete cosine transformer for inverse-discrete-cosine-transforming the transformed coefficient transferred from the inverse quantization section; and a boundary block split section for receiving the reconstructed image single and shape information from the inverse discrete cosine transformer, generating decoded information.

Claim 35

The device as defined in claim 32, wherein the texture coding section variable-length-codes the boundary blocks by using the variable length coding tables being different in the number of coding bits according to the number of object blocks, including the object image, out of a plurality of sub blocks constituting the boundary blocks.

Claim 36

The device as defined in claim 32, wherein the variable length coding tables which the texture coding section uses in variable-length-coding are constructed according to the arrangement characteristics of object blocks, including the object image, out of a plurality of sub blocks constituting the boundary blocks.

Claim 37

The device as defined in claim 36, wherein the variable length coding tables according to the arrangement characteristics of the object blocks have bits that are gradually increased in number with less frequency of occurrence for each arrangement characteristic.

Claim 38

The device as defined in claim 32, wherein the variable length coding tables, where after the boundary blocks of (N×N) size comprising the sub blocks of (N/2×N/2) size are merged by a boundary block merge technique, four object blocks include the object image and they are intra blocks, the object blocks are termed first to fourth object blocks, each object block having other information than a DC component is represented by "1" and each object block having no other information than the DC component is represented by "0", and the first to fourth object blocks, all in four bits, are sequentially arranged from the left side hand, set "0011" for a variable length code if the four object blocks are represented by "0000", and set "00101" for a variable length code if the four object blocks are represented by "0001", set "00100" for a variable length code if the four object blocks are represented by "0010", set "1001" for a variable length code if the four object blocks are represented by "0011", set "00011" for a variable length code if the four object blocks are represented by "0100", set "0111" for a variable length code if the four object blocks are represented by "0101", set "000010" for a variable length code if the four object blocks are represented by "0110", set "1011" for a variable length code if the four object blocks are represented by "0111", set "00010" for a variable length code if the four object blocks are represented by "1000", set "000011" for a variable length code if the four object blocks are represented by "1001", set "0101" for a variable length code if the four object blocks are represented by "1010", set "1010" for a variable length code if the four object blocks are represented by "1011", set "0100" for a variable length code if the four object blocks are represented by "1100", set "1000" for a variable length code if the four object blocks are represented by "1101", set "0110" for a variable length code if the four object blocks are represented by "1110", set "11" for the variable length code if the four object blocks are represented by "1111".

Claim 39

The device as defined in claim 32, wherein the variable length coding tables which the texture coding section uses in variable-length-coding, where after the boundary blocks of (N×N) size comprising the sub blocks of (N/2×N/2) size are merged by a boundary block merge technique, four object blocks include the object image and they are inter blocks or sprite blocks, the object blocks are termed first to fourth object blocks, each object block having other information than a DC component is represented by "1" and each object block having no other information than the DC component is represented by "0", and the first to fourth object blocks, all in four bits, are sequentially arranged from the left side hand, set "0011" for a variable length code if the four object blocks are represented by "1111", and set "00101" for a variable length code if the four object blocks are represented by "1110", set "00100" for a variable length code if the four object blocks are represented by "1101", set "1001" for a variable length code if the four object blocks are represented by "1100", set "00011" for a variable length code if the four object blocks are represented by "1011", set "0111" for a variable length code if the four object blocks are represented by "1010", set "000010" for a variable length code if the four object blocks are represented by "1001", set "1011" for a variable length code if the four object blocks are represented by "1000", set "00010" for a variable length code if the four object blocks are represented by "0111", set "000011" for a variable length code if the four object blocks are represented by "0110", set "0101" for a variable length code if the four object blocks are represented by "0101", set "1010" for a variable length code if the four object blocks are represented by "0100", set "0100" for a variable length code if the four object blocks are represented by "0011", set "1000" for a variable length code if the four object blocks are represented by "0010", set "0110" for a variable length code if the four object blocks are represented by "0001", set "11" for the variable length code if the four object blocks are represented by "0000".

Claim 40

The device as defined in claim 32, wherein the variable length coding tables which the texture coding section uses in variable-length-coding, where after the boundary blocks of (N×N) size comprising the sub blocks of (N/2×N/2) size are merged by a boundary block merge technique, three object blocks include the object image and they are intra blocks, the object blocks are termed first to third object blocks, each object block having other information than a DC component is represented by "1" and each object block having no other information than the DC component is represented by "0", and the first to third object blocks, all in three bits, are sequentially arranged from the left side hand, set "100" for a variable length code if the four object blocks are represented by "000", and set "11111" for a variable length code if the four object blocks are represented by "001", set "11110" for a variable length code if the four object blocks are represented by "010", set "101" for a variable length code if the four object blocks are represented by "011", set "11101" for a variable length code if the four object blocks are represented by "100", set "11100" for a variable length code if the four object blocks are represented by "101", set "110" for a variable length code if the four object blocks are represented by "110", set "0" for a variable length code if the four object blocks are represented by "111".

Claim 41

The device as defined in claim 32, wherein the variable length coding tables which the texture coding section uses in variable-length-coding, where after the boundary blocks of (N×N) size comprising the sub blocks of (N/2×N/2) size are merged by a boundary block merge technique, three object blocks include the object image and they are inter blocks or sprite blocks, the object blocks are termed first to third object blocks, each object block having other information than a DC component is represented by "1" and each object block having no other information than the DC component is represented by "0", and the first to third object blocks, all in three bits, are sequentially arranged from the left side hand, set "100" for a variable length code if the four object blocks are represented by "111", set "11111" for a variable length code if the four object blocks are represented by "110", set "11110" for a variable length code if the four object blocks are represented by "101", set "101" for a variable length code if the four object blocks are represented by "100", set "11101" for a variable length code if the four object blocks are represented by "011", set "11100" for a variable length code if the four object blocks are represented by "010", set "110" for a variable length code if the four object blocks are represented by "001", set "0" for the variable length code if the four object blocks are represented by "000".

Claim 42

The device as defined in claim 32, wherein the variable length coding tables which the texture coding section uses in variable-length-coding, where after the boundary blocks of (N×N) size comprising the sub blocks of (N/2×N/2) size are merged by a boundary block merge technique, two object blocks include the object image and they are intra blocks, the object blocks are termed first to second object blocks, each object block having other information than a DC component is represented by "1" and each object block having no other information than the DC component is represented by "0", and the first to second object blocks, all in two bits, are sequentially arranged from the left side hand, set "111" for a variable length code if the four object blocks are represented by "00", set "110" for a variable length code if the four object blocks are represented by "01", set "10" for a variable length code if the four object blocks are represented by "10", set "0" for the variable length code if the four object blocks are represented by "11".

Claim 43

The device as defined in claim 32, wherein the variable length coding tables which the texture coding section uses in variable-length-coding, where after the boundary blocks of (N×N) size comprising the sub blocks of (N/2×N/2) size are merged by a boundary block merge technique, two object blocks include the object image and they are inter blocks or sprite blocks, the object blocks are termed first to second object blocks, each object block having other information than a DC component is represented by "1" and each object block having no other information than the DC component is represented by "0", and the first to second object blocks, all in two bits, are sequentially arranged from the left side hand, set "111" for a variable length code if the two object blocks are represented by "11", set "110" for a variable length code if the two object blocks are represented by "10", set "10" for a variable length code if the two object blocks are represented by "01", set "0" for the variable length code if the two object blocks are represented by "00".

Claim 44

The device as defined in claim 32, wherein the variable length coding tables which the texture coding section uses in variable-length-coding, where after the boundary blocks of (N×N) size comprising the sub blocks of (N/2×N/2) size are merged by a boundary block merge technique, one object block include the object image and it is intra block, the object block having other information than a DC component is represented by "1" and the object block having no other information than the DC component is represented by "0", and the object block, in one bit, is sequentially arranged, set "1" for a variable length code if the object block is represented by "0", set "0" for a variable length code if the object block is represented by "1".

Claim 45

The device as defined in claim 32, wherein the variable length coding tables which the texture coding section uses in variable-length-coding, where after the boundary blocks of (N×N) size comprising the sub blocks of (N/2×N/2) size are merged by a boundary block merge technique, one object block include the object image and it is inter block or sprite block, the object block having other information than a DC component is represented by "1" and the object block having no other information than the DC component is represented by "0", and the object block, in one bit, is arranged, set "1" for a variable length code if the object block is represented by "0", set "0" for a variable length code if the object block is represented by "1".

Claim 46

The device as defined in claim 32, wherein the texture coding section, comprising: a boundary block merge section for merging boundary blocks including both the object and background images out of shape information received, by using a boundary block merge technique; a variable length coding section for variable-length-coding the quantized image signal transferred from the quantization section; and a variable length coding table memory for storing variable length coding tables used when the merged boundary blocks are variable-length-coded by the variable length coding section.

Claim 47

The device as defined in claim 32, wherein the texture coding section, comprising: a boundary block merge section for merging boundary blocks including both the object and background images out of shape information received, by using a boundary block merge technique; a discrete cosine transformer for discrete-cosine-transforming the image signal concerning the boundary blocks merged by the boundary block merge section; a quantization section for quantizing the transformed coefficient transferred from the discrete cosine transformer; a variable length coding section for variable-length-coding the quantized image signal transferred from the quantization section; and a variable length coding table memory for storing variable length coding tables used when the merged boundary blocks are variable-length-coded by the variable length coding section.

Claim 48

The device as defined in claim 32, wherein the texture coding section, comprising: a boundary block merge section for merging boundary blocks including both the object and background images out of shape information received, by using a boundary block merge technique, and generating an image signal concerning the merged boundary blocks and merge information; a discrete cosine transformer for discrete-cosine-transforming the image signal concerning the boundary blocks merged by the boundary block merge section; a quantization section for quantizing the transformed coefficient transferred from the discrete cosine transformer; and a transformed coefficient and coded block pattern coding section for variable-length-coding the quantized coefficient, and coding a texture information by using the merge information transferred from the boundary block merge section.

Claim 49

The device as defined in claim 32, wherein the texture coding section, comprising: a boundary block padding section receiving the image signal, or an image error signal and the original shape information, and determining the region having no object image as a value or zero by using the mean value of the region having the object image and low-frequency filtering, in sub blocks constituting boundary blocks including the object and background images; a boundary block merge section for merging the boundary blocks out of the shape information transferred from the boundary block padding section by using a boundary block merge technique, and generating the image signal concerning the merged boundary blocks, and merge information; a discrete cosine transformer for discrete-cosine-transforming the image signal concerning the boundary blocks merged by the boundary block merge section; a quantization section for quantizing the transformed coefficient transferred from the discrete cosine transformer; a transformed coefficient and coded block pattern coding section for variable-length-coding the quantized coefficient transferred from the quantization section, and coding texture information by using the merge information transferred from the boundary block merge section; an inverse quantization section for inverse-quantizing the transformed coefficient quantized by the quantization section, and extracting the transformed coefficient; an inverse discrete cosine transformer for inverse-discrete-cosine-transforming the transformed coefficient transferred from the inverse quantization section; and a boundary block split section for receiving the reconstructed image single and shape information from the inverse discrete cosine transformer, generating decoded information.

Claim 51

The device as defined in claim 50, wherein the variable length decoding section decodes the boundary blocks by using the variable length decoding tables being different in the number of decoding bits according to the number of object blocks, including the object image, out of a plurality of sub blocks constituting the boundary blocks.

Claim 52

The device as defined in claim 50, wherein the variable length decoding tables stored in the variable length decoding table memory are differently constructed according to the arrangement characteristics of object blocks, including the object image, out of a plurality of sub blocks constituting the boundary blocks.

Claim 53

The device as defined in claim 52, wherein the variable length decoding tables according to the arrangement characteristics of the object blocks have bits that are gradually increased in number with less frequency of occurrence for each arrangement characteristic in order.

Claim 55

The device as defined in claim 54, wherein the variable length decoding section decodes the boundary blocks by using the variable length decoding tables that are different according to the number of object blocks, including the object image, out of a plurality of sub blocks constituting the boundary blocks.

Claim 56

The device as defined in claim 54, wherein the variable length decoding tables stored in the variable length decoding table memory are differently constructed according to the arrangement characteristics of object blocks, including the object image, out of a plurality of sub blocks constituting the boundary blocks.

Claim 57

The device as defined in claim 56, wherein the variable length decoding tables according to the arrangement characteristics of the object blocks have bits that are gradually increased in number with less frequency of occurrence for each arrangement characteristic in order.

Claim 58

The device as defined in claim 54, wherein the variable length decoding tables stored in the variable length decoding table memory the variable length decoding tables, where the coded object blocks are four intra blocks and termed first to fourth object blocks sequentially arranged from the left side hand, "1" for decoded signal bit indicates an object block having other information than a DC component, and "0" indicates an object block having no other information than the DC component, decode the coded bits "0011" into "0000", decode the coded bits "00101" into "0001", decode the coded bits "00100" into "0010", decode the coded bits "1001" into "0011", decode the coded bits "00011" into "0100", decode the coded bits "0111" into "0101", decode the coded bits "000010" into "0110", decode the coded bits "1011" into "0111", decode the coded bits "00010" into "1000", decode the coded bits "000011" into "1001", decode the coded bits "0101" into "1010", decode the coded bits "1010" into "1011", decode the coded bits "0100" into "1100", decode the coded bits "1000" into "1101", decode the coded bits "0110" into "1110", decode the coded bits "11" into "1111".

Claim 59

The device as defined in claim 54, wherein the variable length decoding tables stored in the variable length decoding table memory, where the coded object blocks are four inter blocks or sprite blocks and termed first to fourth object blocks sequentially arranged from the left side hand, "1" for decoded signal bit indicates an object block having other information than a DC component, and "0" indicates an object block having no other information than the DC component, decode the coded bits "0011" into "1111", decode the coded bits "00101" into "1110", decode the coded bits "00100" into "1101", decode the coded bits "1001" into "1100", decode the coded bits "00011" into "1011", decode the coded bits "0111" into "1010", decode the coded bits "000010" into "1001", decode the coded bits "1011" into "1000", decode the coded bits "00010" into "0111", decode the coded bits "000011" into "0110", decode the coded bits "0101" into "0101", decode the coded bits "1010" into "0100", decode the coded bits "0100" into "0011", decode the coded bits "1000" into "0010", decode the coded bits "0110" into "0001", decode the coded bits "11" into "0000".

Claim 60

The device as defined in claim 54, wherein the variable length decoding tables stored in the variable length decoding table memory the variable length decoding tables, where the coded object blocks are three intra blocks and termed first to third object blocks sequentially arranged from the left side hand, "1" for decoded signal bit indicates an object block having other information than a DC component, and "0" indicates an object block having no other information than the DC component, decode the coded bits "100" into "000", decode the coded bits "11111" into "001", decode the coded bits "11110" into "010", decode the coded bits "101" into "011", decode the coded bits "11101" into "100", decode the coded bits "11100" into "101", decode the coded bits "110" into "110", decode the coded bits "0" into "111".

Claim 61

The device as defined in claim 54, wherein the variable length decoding tables stored in the variable length decoding table memory the variable length decoding tables, where the coded object blocks are three inter blocks or sprite blocks and termed first to third object blocks sequentially arranged from the left side hand, "1" for decoded signal bit indicates an object block having other information than a DC component, and "0" indicates an object block having no other information than the DC component, decode the coded bits "100" into "111", decode the coded bits "11111" into "110", decode the coded bits "11110" into "101", decode the coded bits "101" into "100", decode the coded bits "11101" into "011", decode the coded bits "11100" into "010", decode the coded bits "110" into "001", decode the coded bits "0" into "000".

Claim 62

The device as defined in claim 54, wherein the variable length decoding tables stored in the variable length decoding table memory the variable length decoding tables, where the coded object blocks are two intra blocks and termed first to second object blocks sequentially arranged from the left side hand, "1" for decoded signal bit indicates an object block having other information than a DC component, and "0" indicates an object block having no other information than the DC component, decode the coded bits "111" into "00", decode the coded bits "110" into "01", decode the coded bits "10" into "10", decode the coded bits "0" into "11".

Claim 63

The device as defined in claim 54, wherein the variable length decoding tables stored in the variable length decoding table memory the variable length decoding tables, where the coded object blocks are two inter blocks or sprite blocks and termed first to second object blocks sequentially arranged from the left side hand, "1" for decoded signal bit indicates an object block having other information than a DC component, and "0" indicates an object block having no other information than the DC component, decode the coded bits "111" into "11", decode the coded bits "110" into "10", decode the coded bits "10" into "01", decode the coded bits "0" into "00".

Claim 64

The device as defined in claim 54, wherein the variable length coding tables, where the coded object block is one inter block or sprite block, "1" for decoded signal bit indicates an object block having other information than a DC component, and "0" indicates an object block having no other information than the DC component, decode the coded bits "1" into "0", and "0" into "1".

Claim 65

The device as defined in claim 54, wherein the variable length decoding tables stored in the variable length decoding table memory, where the coded object block is one intra block, "1" for decoded signal bit indicates an object block having other information than a DC component, and "0" indicates an object block having no other information than the DC component, decode the coded bits "1" into "0", decode the coded bits "0" into "1".

Claim 68

The device as defined in claim 67, wherein the unit blocks are video object planes.

Claim 69

The device as defined in claim 67, wherein the texture decoding section comprises: a variable length decoding section for variable-length-decoding the image signal coded by a variable length coding after a boundary block merge technique; a variable length decoding table memory for storing variable length decoding tables used when the coded image signal is decoded by the variable length decoding section; and a boundary block split section for receiving decoded image signal from the variable length decoding section, and splitting boundary blocks or sub blocks constituting the boundary blocks, merged by the boundary block merge technique, into the boundary blocks or their sub blocks before the merge.

Claim 70

The device as defined in claim 67, wherein the texture decoding section comprises: a variable length decoding section for variable-length-decoding the image signal coded by a variable length coding after a boundary block merge technique; a variable length decoding table memory for storing variable length decoding tables used when the coded image signal is decoded by the variable length decoding section; an inverse quantization section for inverse-quantizing the decoded image signal transferred from the transformed coefficient and coded pattern block decoding section; an inverse discrete cosine transformer for inverse-discrete-cosine-transforming the inverse-quantized image signal transferred from the inverse quantization section; and a boundary block split section for receiving decoded image signal from the variable length decoding section, and splitting boundary blocks or sub blocks constituting the boundary blocks, merged by the boundary block merge technique, into the boundary blocks or their sub blocks before the merge.

Claim 71

The device as defined in claim 67, wherein the texture decoding section comprises: a merge information extraction section for receiving the shape information of the object image coded by a boundary block merge technique, and extracting merge information; a transformed coefficient and coded section pattern decoding section for receiving the merge information transferred from the merge information extraction section and the coded image signal from an encoder, and variable-length-decoding transformed coefficients and coded pattern blocks; an inverse quantization section for inverse-quantizing the decoded image signal transferred from the transformed coefficient and coded pattern block decoding section; an inverse discrete cosine transformer for inverse-discrete-cosine-transforming the inverse-quantized image signal transferred from the inverse quantization section; and a boundary block split section for receiving the transformed image signal from the inverse discrete cosine transformer and the merge information from the merge information extraction section, and splitting boundary blocks or sub blocks constituting the boundary blocks, merged by the boundary block merge technique, into the boundary blocks or their sub blocks before the merge.

Claim 72

The device as defined in claim 71, wherein the transformed coefficient and coded block pattern decoding section variable-length-decodes the boundary blocks by using the variable length decoding tables that are different according to the number of object blocks, including the object image, out of a plurality of sub blocks constituting the boundary blocks.

Claim 73

The device as defined in claim 71, wherein the variable length decoding table of the variable length decoding table memory constructs according to the arrangement characteristics of object blocks, including the object image, out of a plurality of sub blocks constituting the boundary blocks.

Claim 74

The device as defined in claim 71, wherein the variable length decoding tables which the transformed coefficient and coded block pattern decoding section uses in variable-length-decoding constructs to represent the arrangement characteristics of the object blocks have bits that are gradually increased in number with less frequency of occurrence for each arrangement characteristic in order.

Claim 75

The device as defined in claim 71, wherein the variable length decoding tables which the transformed coefficient and coded block pattern decoding section uses in variable-length-decoding, where the coded object blocks are four intra blocks and termed first to fourth object blocks sequentially arranged from the left side hand, "1" for decoded signal bit indicates an object block having other information than a DC component, and "0" indicates an object block having no other information than the DC component, decode the coded bits "0011" into "0000", decode the coded bits "00101" into "0001", decode the coded bits "00100" into "0010", decode the coded bits "1001" into "0011", decode the coded bits "00011" into "0100", decode the coded bits "0111" into "0101", decode the coded bits "000010" into "0110", decode the coded bits "1011" into "0111", decode the coded bits "00010" into "1000", decode the coded bits "000011" into "1001", decode the coded bits "0101" into "1010", decode the coded bits "1010" into "1011", decode the coded bits "0100" into "1100", decode the coded bits "1000" into "1101", decode the coded bits "0110" into "1110", decode the coded bits "11" into "1111".

Claim 76

The device as defined in claim 71, wherein the variable length decoding tables which the transformed coefficient and coded block pattern decoding section uses in variable-length-decoding, where the coded object blocks are four inter blocks or sprite blocks and termed first to fourth object blocks sequentially arranged from the left side hand, "1" for decoded signal bit indicates an object block having other information than a DC component, and "0" indicates an object block having no other information than the DC component, decode the coded bits "0011" into "1111", decode the coded bits "00101" into "1110", decode the coded bits "00100" into "1101", decode the coded bits "1001" into "1100", decode the coded bits "00011" into "1011", decode the coded bits "0111" into "1010", decode the coded bits "000010" into "1001", decode the coded bits "1011" into "1000", decode the coded bits "00010" into "0111", decode the coded bits "000011" into "0110", decode the coded bits "0101" into "0101", decode the coded bits "1010" into "0100", decode the coded bits "0100" into "0011", decode the coded bits "1000" into "0010", decode the coded bits "0110" into "0001", decode the coded bits "11" into "0000".

Claim 77

The device as defined in claim 71, wherein the variable length decoding tables which the transformed coefficient and coded block pattern decoding section uses in variable-length-decoding, where the coded object blocks are three intra blocks and termed first to third object blocks sequentially arranged from the left side hand, "1" for decoded signal bit indicates an object block having other information than a DC component, and "0" indicates an object block having no other information than the DC component, decode the coded bits "100" into "000", decode the coded bits "11111" into "001", decode the coded bits "11110" into "010", decode the coded bits "101" into "011", decode the coded bits "11101" into "100", decode the coded bits "11100" into "101", decode the coded bits "110" into "110", decode the coded bits "0" into "111".

Claim 78

The device as defined in claim 71, wherein the variable length decoding tables which the transformed coefficient and coded block pattern decoding section uses in variable-length-decoding, where the coded object blocks are three inter blocks or sprite blocks and termed first to third object blocks sequentially arranged from the left side hand, "1" for decoded signal bit indicates an object block having other information than a DC component, and "0" indicates an object block having no other information than the DC component, decode the coded bits "100" into "111", decode the coded bits "11111" into "110", decode the coded bits "11110" into "101", decode the coded bits "101" into "100", decode the coded bits "11101" into "011", decode the coded bits "11100" into "010", decode the coded bits "110" into "001", decode the coded bits "0" into "000".

Claim 79

The device as defined in claim 71, wherein the variable length decoding tables which the transformed coefficient and coded block pattern decoding section uses in variable-length-decoding, where the coded object blocks are two intra blocks and termed first to second object blocks sequentially arranged from the left side hand, "1" for decoded signal bit indicates an object block having other information than a DC component, and "0" indicates an object block having no other information than the DC component, decode the coded bits "111" into "00", decode the coded bits "110" into "01", decode the coded bits "10" into "10", decode the coded bits "0" into "11".

Claim 80

The device as defined in claim 71, wherein the variable length decoding tables which the transformed coefficient and coded block pattern decoding section uses in variable-length-decoding, where the coded object blocks are two inter blocks or sprite blocks and termed first to second object blocks sequentially arranged from the left side hand, "1" for decoded signal bit indicates an object block having other information than a DC component, and "0" indicates an object block having no other information than the DC component, decode the coded bits "111" into "11", decode the coded bits "110" into "10", decode the coded bits "10" into "01", decode the coded bits "0" into "00".

Claim 81

The device as defined in claim 71, wherein the variable length decoding tables which the transformed coefficient and coded block pattern decoding section uses in variable-length-decoding, where the coded object block is one inter block or sprite block, "1" for decoded signal bit indicates an object block having other information than a DC component, and "0" indicates an object block having no other information than the DC component, decode the coded bits "1" into "0", decode the coded bits "0" into "1".

Claim 82

The device as defined in claim 71, wherein the variable length decoding tables which the transformed coefficient and coded block pattern decoding section uses in variable-length-decoding, where the coded object block is one inter block or sprite block, "1" for decoded signal bit indicates an object block having other information than a DC component, and "0" indicates an object block having no other information than the DC component, decode the coded bits "1" into "0", and "0" into "1".

Claim 84

The method as defined in claim 83, wherein a plurality of boundary blocks are merged in step (a).

Claim 85

The method as defined in claim 83, wherein a plurality of sub blocks constituting the boundary blocks are merged in step (a).

Claim 86

The method as defined in claim 83, wherein luminance blocks are merged in step (a).

Claim 87

The method as defined in claim 83, wherein chrominance blocks are merged in step (a).

Claim 88

The method as defined in claim 83, wherein the luminance and chrominance blocks are each merged in separate groups.

Claim 89

The method as defined in claim 83, wherein the variable length coding step variable-length-codes the boundary blocks by using the variable length coding tables being different in the number of coding bits according to the number of object blocks, including the object image, out of a plurality of sub blocks constituting the boundary blocks.

Claim 90

The method as defined in claim 83, wherein the variable length coding step variable-length-coding codes the boundary blocks by using the variable length coding tables being different in the number of coding bits according to the arranging characteristics of object blocks, including the object image, out of a plurality of sub blocks constituting the boundary blocks.

Claim 91

The method as defined in claim 83, wherein the variable length coding step variable-length-codes the boundary blocks by using the variable length coding tables as follows: the variable length coding tables according to the arrangement characteristics of the object blocks have bits that are gradually increased in number with less frequency of occurrence for each arrangement characteristic.

Claim 92

The method as defined in claim 91, wherein the variable length coding tables, where after the boundary blocks of (N×N) size comprising the sub blocks of (N/2×N/2) size are merged by a boundary block merge technique, four object blocks include the object image and they are intra blocks, the object blocks are termed first to fourth object blocks, each object block having other information than a DC component is represented by "1" and each object block having no other information than the DC component is represented by "0", and the first to fourth object blocks, all in four bits, are sequentially arranged from the left side hand, set "0011" for a variable length code if the four object blocks are represented by "0000", set "00101" for a variable length code if the four object blocks are represented by "0001", set "00100" for a variable length code if the four object blocks are represented by "0010", set "1001" for a variable length code if the four object blocks are represented by "0011", set "00011" for a variable length code if the four object blocks are represented by "0100", set "0111" for a variable length code if the four object blocks are represented by "0101", set "000010" for a variable length code if the four object blocks are represented by "0110", set "1011" for a variable length code if the four object blocks are represented by "0111", set "00010" for a variable length code if the four object blocks are represented by "1000", set "000011" for a variable length code if the four object blocks are represented by "1001", set "0101" for a variable length code if the four object blocks are represented by "1010", set "1010" for a variable length code if the four object blocks are represented by "1011", set "0100" for a variable length code if the four object blocks are represented by "1100", set "1000" for a variable length code if the four object blocks are represented by "1101", set "0110" for a variable length code if the four object blocks are represented by "1110", set "11" for the variable length code if the four object blocks are represented by "1111".

Claim 93

The method as defined in claim 91, wherein the variable length coding tables, where after the boundary blocks of (N×N) size comprising the sub blocks of (N/2×N/2) size are merged by a boundary block merge technique, four object blocks include the object image and they are inter blocks or sprite blocks, the object blocks are termed first to fourth object blocks, each object block having other information than a DC component is represented by "1" and each object block having no other information than the DC component is represented by "0", and the first to fourth object blocks, all in four bits, are sequentially arranged from the left side hand, set "0011" for a variable length code if the four object blocks are represented by "1111", and set "00101" for a variable length code if the four object blocks are represented by "1110", set "00100" for a variable length code if the four object blocks are represented by "1101", set "1001" for a variable length code if the four object blocks are represented by "1100", set "00011" for a variable length code if the four object blocks are represented by "1011", set "0111" for a variable length code if the four object blocks are represented by "1010", set "000010" for a variable length code if the four object blocks are represented by "1001", set "1011" for a variable length code if the four object blocks are represented by "1000", set "00010" for a variable length code if the four object blocks are represented by "0111", set "000011" for a variable length code if the four object blocks are represented by "0110", set "0101" for a variable length code if the four object blocks are represented by "0101", set "1010" for a variable length code if the four object blocks are represented by "0100", set "0100" for a variable length code if the four object blocks are represented by "0011", set "1000" for a variable length code if the four object blocks are represented by "0010", set "0110" for a variable length code if the four object blocks are represented by "0001", set "11" for the variable length code if the four object blocks are represented by "0000".

Claim 94

The method as defined in claim 91, wherein the variable length coding tables, where after the boundary blocks of (N×N) size comprising the sub blocks of (N/2×N/2) size are merged by a boundary block merge technique, three object blocks include the object image and they are intra blocks, the object blocks are termed first to third object blocks, each object block having other information than a DC component is represented by "1" and each object block having no other information than the DC component is represented by "0", and the first to third object blocks, all in three bits, are sequentially arranged from the left side hand, set "100" for a variable length code if the three object blocks are represented by "000", and set "11111" for a variable length code if the three object blocks are represented by "001", set "11110" for a variable length code if the three object blocks are represented by "010", set "101" for a variable length code if the three object blocks are represented by "011", set "11101" for a variable length code if the three object blocks are represented by "100", set "11100" for a variable length code if the three object blocks are represented by "101", set "110" for a variable length code if the three object blocks are represented by "110", set "0" for a variable length code if the three object blocks are represented by "111".

Claim 95

The method as defined in claim 91, wherein the variable length coding tables, where after the boundary blocks of (N×N) size comprising the sub blocks of (N/2×N/2) size are merged by a boundary block merge technique, three object blocks include the object image and they are inter blocks or sprite blocks, the object blocks are termed first to third object blocks, each object block having other information than a DC component is represented by "1" and each object block having no other information than the DC component is represented by "0", and the first to third object blocks, all in three bits, are sequentially arranged from the left side hand, set "100" for a variable length code if the three object blocks are represented by "111", set "11111" for a variable length code if the three object blocks are represented by "110", set "11110" for a variable length code if the three object blocks are represented by "101", set "101" for a variable length code if the three object blocks are represented by "100", set "11101" for a variable length code if the three object blocks are represented by "011", set "11100" for a variable length code if the three object blocks are represented by "010", set "110" for a variable length code if the three object blocks are represented by "001", set "0" for the variable length code if the three object blocks are represented by "000".

Claim 96

The method as defined in claim 91, wherein the variable length coding tables , where after the boundary blocks of (N×N) size comprising the sub blocks of (N/2×N/2) size are merged by a boundary block merge technique, two object blocks include the object image and they are intra blocks, the object blocks are termed first to second object blocks, each object block having other information than a DC component is represented by "1" and each object block having no other information than the DC component is represented by "0", and the first to second object blocks, all in two bits, are sequentially arranged from the left side hand, set "111" for a variable length code if the two object blocks are represented by "00", set "110" for a variable length code if the two object blocks are represented by "01", set "10" for a variable length code if the two object blocks are represented by "10", set "0" for the variable length code if the two object blocks are represented by "11".

Claim 97

The method as defined in claim 91, wherein the variable length coding tables, where after the boundary blocks of (N×N) size comprising the sub blocks of (N/2×N/2) size are merged by a boundary block merge technique, two object blocks include the object image and they are inter blocks or sprite blocks, the object blocks are termed first to second object blocks, each object block having other information than a DC component is represented by "1" and each object block having no other information than the DC component is represented by "0", and the first to second object blocks, all in two bits, are sequentially arranged from the left side hand, set "111" for a variable length code if the two object blocks are represented by "11", set "110" for a variable length code if the two object blocks are represented by "10", set "10" for a variable length code if the two object blocks are represented by "01", set "0" for the variable length code if the two object blocks are represented by "00".

Claim 98

The method as defined in claim 91, wherein the variable length coding tables, where after the boundary blocks of (N×N) size comprising the sub blocks of (N/2×N/2) size are merged by a boundary block merge technique, one object block include the object image and it is intra block, the object block having other information than a DC component is represented by "1" and the object block having no other information than the DC component is represented by "0", and the object block, in one bit, is sequentially arranged, set "1" for a variable length code if the object block is represented by "0", set "0" for a variable length code if the object block is represented by "1".

Claim 99

The method as defined in claim 91, wherein the variable length coding tables, where after the boundary blocks of (N×N) size comprising the sub blocks of (N/2×N/2) size are merged by a boundary block merge technique, one object block include the object image and it is inter block or sprite block, the object block having other information than a DC component is represented by "1" and the object block having no other information than the DC component is represented by "0", and the object block, in one bit, is sequentially arranged, set "1" for a variable length code if the object block is represented by "0", set "0" for a variable length code if the object block is represented by "1".

Claim 101

The method as defined in claim 100, wherein the variable-length-decoding step variable-length-decodes the boundary blocks by using the variable length coding tables being different in the number of coding bits according to the number of object blocks, including the object image, out of a plurality of sub blocks constituting the boundary blocks.

Claim 102

The method as defined in claim 100, wherein the variable-length-coding step variable-length-coding codes the boundary blocks by using the variable length coding tables being different in the number of coding bits according to the arranging characteristics of object blocks, including the object image, out of a plurality of sub blocks constituting the boundary blocks.

Claim 103

The method as defined in claim 100, wherein the variable-length-coding step variable-length-codes the boundary blocks by using the variable length coding tables as follows: the variable length coding tables according to the arrangement characteristics of the object blocks have bits that are gradually increased in number with less frequency of occurrence for each arrangement characteristic.

Claim 104

The method as defined in claim 103, wherein the variable length coding tables, where the coded object blocks are four intra blocks and termed first to fourth object blocks sequentially arranged from the left side hand, "1" for decoded signal bit indicates an object block having other information than a DC component, and "0" indicates an object block having no other information than the DC component, decode the coded bits "0011" into "0000", decode the coded bits "00101" into "0001", decode the coded bits "00100" into "0010", decode the coded bits "1001" into "0011", decode the coded bits "00011" into "0100", decode the coded bits "0111" into "0101", decode the coded bits "000010" into "0110", decode the coded bits "1011" into "0111", decode the coded bits "00010" into "1000", decode the coded bits "000011" into "1001", decode the coded bits "0101" into "1010", decode the coded bits "1010" into "1011", decode the coded bits "0100" into "1100", decode the coded bits "1000" into "1101", decode the coded bits "0110" into "1110", decode the coded bits "11" into "1111".

Claim 105

The method as defined in claim 103, wherein the variable length coding tables, where the coded object blocks are four inter blocks or sprite blocks and termed first to fourth object blocks sequentially arranged from the left side hand, "1" for decoded signal bit indicates an object block having other information than a DC component, and "0" indicates an object block having no other information than the DC component, decode the coded bits "0011" into "1111", decode the coded bits "00101" into "1110", decode the coded bits "00100" into "1101", decode the coded bits "1001" into "1100", decode the coded bits "00011" into "1011", decode the coded bits "0111" into "1010", decode the coded bits "000010" into "1001", decode the coded bits "1011" into "1000", decode the coded bits "00010" into "0111", decode the coded bits "000011" into "0110", decode the coded bits "0101" into "0101", decode the coded bits "1010" into "0100", decode the coded bits "0100" into "0011", decode the coded bits "1000" into "0010", decode the coded bits "0110" into "0001", decode the coded bits "11" into "0000".

Claim 106

The method as defined in claim 103, wherein the variable length coding tables, where the coded object blocks are three intra blocks and termed first to third object blocks sequentially arranged from the left side hand, "1" for decoded signal bit indicates an object block having other information than a DC component, and "0" indicates an object block having no other information than the DC component, decode the coded bits "100" into "000", decode the coded bits "11111" into "001", decode the coded bits "11110" into "010", decode the coded bits "101" into "011", decode the coded bits "11101" into "100", decode the coded bits "11100" into "101", decode the coded bits "110" into "110", decode the coded bits "0" into "111".

Claim 107

The method as defined in claim 103, wherein the variable length coding tables, where the coded object blocks are three inter blocks or sprite blocks and termed first to third object blocks sequentially arranged from the left side hand, "1" for decoded signal bit indicates an object block having other information than a DC component, and "0" indicates an object block having no other information than the DC component, decode the coded bits "100" into "111", decode the coded bits "11111" into "110", decode the coded bits "11110" into "101", decode the coded bits "101" into "100", decode the coded bits "11101" into "011", decode the coded bits "11100" into "010", decode the coded bits "110" into "001", decode the coded bits "0" into "000".

Claim 108

The method as defined in claim 103, wherein the variable length coding tables , where the coded object blocks are two intra blocks and termed first to second object blocks sequentially arranged from the left side hand, "1" for decoded signal bit indicates an object block having other information than a DC component, and "0" indicates an object block having no other information than the DC component, decode the coded bits "111" into "00", decode the coded bits "110" into "01", decode the coded bits "10" into "10", decode the coded bits "0" into "11".

Claim 109

The method as defined in claim 103, wherein the variable length coding tables, where the coded object blocks are two inter blocks or sprite blocks and termed first to second object blocks sequentially arranged from the left side hand, "1" for decoded signal bit indicates an object block having other information than a DC component, and "0" indicates an object block having no other information than the DC component, decode the coded bits "111" into "11", decode the coded bits "110" into "10", decode the coded bits "10" into "01", decode the coded bits "0" into "00".

Claim 110

The method as defined in claim 103, wherein the variable length coding tables, where the coded object block is one intra block, "1" for decoded signal bit indicates an object block having other information than a DC component, and "0" indicates an object block having no other information than the DC component, decode the coded bits "1" into "0", decode the coded bits "0" into "1".

Claim 111

The method as defined in claim 103, wherein the variable length coding tables, where the coded object block is one, inter block or sprite block, "1" for decoded signal bit indicates an object block having other information than a DC component, and "0" indicates an object block having no other information than the DC component, decode the coded bits "1" into "1", decode the coded bits "0" into "0".