Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
235 words
A vertical compression circuit for an image playback system displaying an image through interlaced scanning, comprising: a line memory unit (32) for storing and outputting a filtering coefficient, or storing and outputting a filtering coefficient which is a sum of its output and a filtering coefficient externally input, according to an input of a feedback control signal; a mode counter (14) for counting horizontal lines within one section of vertical lines and outputting the result while outputting a memory line designating signal for designating a line stored in video random access memory, responding to a compression mode signal; a coefficient selection signal generating unit (12, 16) for outputting a coefficient selection signal for selecting first and second filtering coefficients, responding to the compression mode signal, and for sending the feedback control signal to the memory (32); a first coefficient selecting unit (18, 20) for generating coefficients corresponding to various compression modes and outputting the coefficient corresponding to the compression mode, selected by the first coefficient selection signal; a second coefficient selecting unit (26, 28) for generating coefficients corresponding to various compression modes and outputting the coefficient corresponding to the compression mode, selected by the second coefficient selection signal, into the line memory unit (32); and a unit (22) for adding up the outputs of the first coefficient selecting unit (18, 20) and the line memory unit (32), and for sending the result to video memory.
Claim 2
Dependent Claim
31 words
A circuit according to claim 1, wherein said coefficient selection signal generating unit comprises a first coefficient selection signal generating unit (12) and a second coefficient selection signal generating unit (16).
Claim 3
Dependent Claim
47 words
A circuit according to claim 2, wherein the first coefficient selection signal generating unit (12) generates the first coefficient selection signal according to inputs designating vertical compression mode, interlaced/progressive scanning mode, ODD/EVEN, and the output from the mode counter (14) and further generates the feedback control signal.
Claim 4
Dependent Claim
42 words
A circuit according to claim 2 or 3, wherein the second coefficient selection signal generating unit (16) generates the second coefficient selection signal according to inputs designating vertical compression mode, interlaced/progressive scanning mode, ODD/EVEN, and the output from the mode counter (14).
Claim 5
Dependent Claim
39 words
A circuit according to any of the preceding claims, wherein the first coefficient selecting unit comprises a first coefficient generator (18) and a first multiplexer (20), the first multiplexer (20) being adapted to receive the first coefficient selection signal.
Claim 6
Dependent Claim
37 words
A circuit according to any of the preceding claims, wherein the second coefficient selecting unit comprises a second coefficient generator (26) and a second multiplexer (28), the second multiplexer being adapted to receive the second selection signal.
Claim 7
Dependent Claim
45 words
A circuit according to any of the preceding claims, wherein the feedback control signal is input to a first input of an AND gate (34), and a second input of said AND gate (34) is connected to the output of the line memory unit (32).
Claim 8
Dependent Claim
63 words
A circuit according to claim 7, wherein the AND gate (34) has its output connected to a first input of an adder (30), a second input of said adder (30) is connected to receive the output of the second coefficient selecting unit (26, 28) and a summed output from the adder (30) is received at the input of said line memory unit (32).