Patent EP0786871A2 successfully refreshed from Google Patents.
EP0786871A2
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EP
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programmable logic array integrated circuits
Assignee: Altera Corp
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Filing: 1992-08-06
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Granted: —
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Expires: 2012-08-06
Abstract
Abstract A programmable logic array integrated circuit has a plurality of programmable logic elements grouped into a plurality of mutually exclusive groups. Each group includes signal conductors uniquely associated with that group for conveying signals between the programmable logic elements in that group. Other signal conductors are provided for conveying signals between the groups. Multiplexers can be used in various ways to reduce the number of programmable interconnections required between signal conductors.
Inventors
- 👤 Bruce B. Pederson
- 👤 Richard G. Cliff
- 👤 Bahram Ahanin
- 👤 Craig Schilling Lytle
- 👤 Francis B. Heile
- 👤 Kerry Scott Veenstra
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-07 07:22
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/02; H03K19/173; H03K19/1733; H03K19/1737; H03K19/177; H03K19/17704; H03K19/17724; H03K19/17728; H03K19/17736
Claims Analysis
Total Claims: 34
Claim 1
Independent Claim
101 words
A programmable logic array having a plurality of programmable logic elements, each of which has at least one output lead and at least one of which has at least one input lead, means for selectively connecting any one of said output leads to said input lead; characterised in that said means comprises a multiplexer having a plurality of inputs and an output for selectively connecting any one of its inputs to its outputs; means for connecting each of said output leads to a respective one of said multiplexer inputs; and means for connecting said multiplexer out put to said input lead.
Claim 2
Dependent Claim
18 words
The apparatus defined in claim 1 further comprising: programmable means for controlling the connection made by said multiplexer.
Claim 3
Dependent Claim
76 words
Apparatus for connecting any one of a plurality of first conductors on an integrated circuit to any of a plurality of second conductors on said circuit comprising: a multiplexer having a plurality of inputs and an output for selectively connecting any one of its inputs to its output, each of said inputs being connected to a respective one of said first conductors; and means for selectively connecting said multiplexer output to any of said second conductors.
Claim 4
Dependent Claim
50 words
The apparatus defined in claim 3 wherein said second conductors cross said first conductors without possibility of interconnection, and wherein said means for selectively connecting comprises: a multiplexer output lead which crosses said second conductors; and means for selectively connecting said multiplexer output lead to each of said second conductors.
Claim 5
Dependent Claim
18 words
The apparatus defined in claim 3 further comprising: programmable means for controlling the connection made by said multiplexer.
Claim 6
Dependent Claim
26 words
The apparatus defined in claim 3 wherein said means for selectively connecting comprises: a programmable interconnection between said multiplexer output and each of said second conductors.
Claim 7
Dependent Claim
37 words
The apparatus defined in claim 4 wherein said means for selectively connecting said multiplexer output lead to each of said second conductors comprises: a programmable interconnection between said multiplexer output lead and each of said input leads.
Claim 8
Dependent Claim
107 words
Apparatus for applying the signal on any one of a plurality of first signal conductors on an integrated circuit to an input terminal of a signal utilization device on said circuit comprising: a plurality of second signal conductors, each of which is selectively connectable to one conductor in a respective subplurality of said first signal conductors; and a multiplexer having a plurality of inputs and an output for selectively connecting any one of its inputs to its outputs, each of said inputs being connected to a respective one of said second signal conductors, and said output being connected to said input terminal of said signal utilization device.
Claim 9
Dependent Claim
59 words
The apparatus defined in claim 8 wherein said first signal conductors are substantially parallel to one another, wherein said second signal conductors are substantially parallel to one another and transverse to said first signal conductors, and wherein the first signal conductors in each of said subpluralities are interdigitated with the first signal conductors in each other of said subpluralities.
Claim 10
Dependent Claim
12 words
The apparatus defined in claim 8 wherein said subpluralities are mutually exclusive.
Claim 11
Dependent Claim
18 words
The apparatus defined in claim 8 further comprising: programmable means for controlling the connection made by said multiplexer.
Claim 12
Dependent Claim
29 words
The apparatus defined in claim 8 wherein the selective connections between said first and second signal conductors are made by programmable interconnections between said first and second signal conductors.
Claim 13
Dependent Claim
29 words
The apparatus defined in claim 12 wherein a single programmable element controls the programmable interconnections between at least two of said second signal conductors and said first signal conductors.
Claim 14
Dependent Claim
12 words
The apparatus defined in claim 13 wherein said subpluralities are mutually exclusive.
Claim 15
Dependent Claim
53 words
The apparatus defined in claim 12 wherein a single programmable element controls (1) the programmable interconnection between a first of said first signal conductors and a first of said second signal conductors, and (2) the programmable interconnection between a second of said first signal conductors and a second of said second signal conductors.
Claim 16
Dependent Claim
119 words
A programmable logic array device having a plurality of programmable logic elements, each of which has at least one input lead and at least one output lead, said programmable logic elements being grouped into a plurality of mutually exclusive groups, said device comprising: a plurality of first signal conductors uniquely associated with each of said groups for selectively connecting the output lead of each of the programmable logic elements in that group to the input lead of other programmable elements in that group; and a plurality of second signal conductors for selectively connecting the output lead of at least one of the programmable logic elements in each group to the input lead of programmable logic elements in other groups.
Claim 17
Dependent Claim
59 words
The device defined in claim 16 wherein each of said second signal conductors can receive a signal from any one of an associated plurality of said output leads, and wherein said device further comprises: gate means associated with each of said output leads for selectively applying the signal on the associated output lead to the associated second signal conductor.
Claim 18
Dependent Claim
31 words
The device defined in claim 17 further comprising: programmable means for controlling whether or not said gate means applies the signal on the associated output lead to the associated second conductor.
Claim 19
Dependent Claim
111 words
The device defined in claim 16 wherein said groups are disposed on said device in a two-dimensional array, wherein said second signal conductors are substantially parallel to a first dimension of said two-dimensional array and conduct signals between groups which are arrayed substantially parallel to said first dimension, and wherein said device further comprises: a plurality of third signal conductors substantially parallel to a second dimension of said two-dimensional array for selectively connecting the output lead of at least one programmable logic element in each group to the input leads of programmable logic elements in other groups which have array displacement components from said group substantially parallel to said second dimension.
Claim 20
Dependent Claim
37 words
The device defined in claim 19 further comprising: means for selectively connecting each of said third conductors to selected ones of said second conductors in order to selectively connect to the input leads of programmable logic elements.
Claim 21
Dependent Claim
39 words
The device defined in claim 19 further comprising: gate means associated with said at least one programmable logic element for selectively applying the signal on the output lead of that programmable logic element to an associated third signal conductor,
Claim 22
Dependent Claim
32 words
The device defined in claim 21 further comprising: programmable means for controlling whether or not said gate means applies the associated programmable logic element output signal to the associated third signal conductor.
Claim 23
Dependent Claim
74 words
The device defined in claim 19 wherein said at least one programmable logic element comprises: a multiplexer for selectively connecting one of a plurality of inputs to an output, a first of said inputs being connected to the output lead of said at least one programmable logic element, a second of said inputs being connected to one of said third signal conductors, and said output being connected to one of said second signal conductors.
Claim 24
Dependent Claim
18 words
The device defined in claim 23 further comprising: programmable means for controlling the connection made by said multiplexer.
Claim 25
Dependent Claim
172 words
A programmable logic array integrated circuit comprising: a plurality of logic modules, each of which has a plurality of inputs and at least one output for producing as said output a programmable logical function of said inputs, said logic modules being disposed on said circuit in a two dimensional array of rows and columns of said logic modules; a plurality of first conductors adjacent to each of the rows of logic modules extending continuously without interruption past all of the logic modules in that row in a direction substantially parallel to a first dimension of said array; a plurality of second conductors adjacent to each of the columns of logic modules extending continuously without interruption past all of the logic modules in that column in a direction substantially parallel to a second dimension of said array; and a programmable switch adjacent to and distinct from each of said logic modules for connecting to one of said first conductors either the output of the adjacent logic module or one of said second conductors.
Claim 26
Dependent Claim
28 words
The circuit defined in claim 30 further comprising: tri-state driver means associated with each of said programmable switches for selectively amplifying a signal passed by the associated switch.
Claim 27
Dependent Claim
26 words
The circuit defined in claim 31 further comprising: programmable memory means associated with each of said tri-state driver means for controlling the associated tri-state driver means.
Claim 28
Dependent Claim
31 words
The circuit defined in claim 25 further comprising: means associated with each of said logic modules for applying the output of the associated logic module to one of said second conductors.
Claim 29
Dependent Claim
40 words
The circuit defined in claim 28 wherein each of said means for applying is programmably switchable to an off condition in which it does not apply the output of the associated logic module to said one of said second conductors.
Claim 30
Dependent Claim
17 words
The circuit defined in claim 29 wherein each of said means for applying comprises a tri-state driver.
Claim 31
Dependent Claim
24 words
The circuit defined in claim 30 further comprising: programmable memory means associated with each of said tri-state drivers for controlling the associated tri-state driver.
Claim 32
Dependent Claim
15 words
The circuit defined in claim 25 wherein each of said programmable switches is a multiplexer.
Claim 33
Dependent Claim
22 words
The circuit defined in claim 32 further comprising: programmable memory means associated with each of said multiplexers for controlling the associated multiplexer.
Claim 34
Dependent Claim
28 words
The circuit defined in claim 25 wherein each of said programmable switches programmably selects said one of said second conductors from an associated multiplicity of said second conductors.
References Cited (Backward Citations)
No citation records indexed.
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