Patent US1826501A successfully refreshed from Google Patents.
Patent EP0779666A2 successfully refreshed from Google Patents.
EP0779666A2
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EP
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Semiconductor device and method of fabricating semiconductor device
Assignee: Mitsubishi Electric Corp
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Filing: 1996-08-13
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Granted: —
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Expires: 2016-08-13
Abstract
Abstract A semiconductor device comprises an Si substrate (1), a stress absorbing layer (2) comprising GaAs and disposed on the Si substrate (1), a compound buffer layer (3) having a composition of Al x Ga 1-x-y In y N (0 ≤ x ≤ 1, 0 ≤ y ≤ 1) and disposed on the stress absorbing layer (2), and a compound semiconductor layer (4) having a composition of Al x Ga 1-x-y In y N (0 ≤ x ≤ 1, 0 ≤ y ≤ 1) and disposed on the buffer layer (3). Therefore, the buffer layer (3) protects the GaAs stress absorbing layer (2) from high temperatures during the formation of the compound semiconductor layer (4), whereby the stress absorbing layer (2) is prevented from decomposition. As a result, a stress due to lattice mismatch or thermal stress between the Si substrate (1) and the compound semiconductor layer (4) is absorbed in the GaAs stress absorbing layer (2) having a lowest bulk modulus, whereby the compound semiconductor layer (4) with reduced dislocations is grown on the buffer layer (3) and bending of the Si substrate (1) is prevented.
Inventors
- 👤 Diethard c/o Mitsubishi Denki K.K. Marx
- 👤 Zempei c/o Mitsubishi Denki K.K. Kawazu
- 👤 Norio C/O Mitsubishi Denki K.K. Hayafuji
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-27 22:27
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/80; H10D62/85; H10D62/852; H10D62/82; H10H; H10H20/00; H10H20/01; H10H20/011; H10H20/013; H10H20/0133; H10H20/01335
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
92 words
A semiconductor device (Fig. 1) comprising: an Si substrate (1); a stress absorbing layer (2) comprising GaAs and disposed on the Si substrate (1); a compound buffer layer (3) having a composition of Al x Ga 1-x-y In y N (0 ≤ x ≤ 1, 0 ≤ y ≤ 1) and disposed on the stress absorbing layer (2); and a compound semiconductor layer (4) having a composition of Al x Ga 1-x-y In y N (0 ≤ x ≤ 1, 0 ≤ y ≤ 1) and disposed on the buffer layer (3).
Claim 2
Dependent Claim
21 words
The semiconductor device of claim 1 (Fig. 1) wherein the stress absorbing layer (2) is as thin as 1nm ∼ 300nm.
Claim 3
Dependent Claim
108 words
A semiconductor device (Fig. 3) comprising: an Si substrate (1) having a bonding number; low bonding power layers (7) comprising a material which has a bonding number smaller than that of Si and disposed on regions of the Si substrate (1); a stress absorbing layer (2) comprising GaAs and disposed on the low bonding power layers (7) and on the Si substrate (1) where the low bonding power layers (7) are not present; and a compound semiconductor layer (4) having a composition of Al x Ga 1-x-y In y N (0 ≤ x ≤ 1, 0 ≤ y ≤ 1) and disposed on the stress absorbing layer (2).
Claim 4
Dependent Claim
55 words
The semiconductor device of claim 3 (Fig. 3) comprising: a compound buffer layer (3) having a composition of Al x Ga 1-x-y In y N (0 ≤ x ≤ 1, 0 ≤ y ≤ 1) and disposed on the stress absorbing layer (2); and a compound semiconductor layer (4) disposed on the buffer layer (3).
Claim 5
Dependent Claim
31 words
The semiconductor device of claim 3 (Fig. 3) wherein the low bonding power layer (7) comprises one selected from the groups consisting of SiO x , SiN x , or SiON.
Claim 6
Dependent Claim
92 words
A semiconductor device (Fig. 5) comprising: an Si substrate (1); a stress absorbing layer (122) comprising As and disposed on the Si substrate (1); a compound buffer layer (3) having a composition of Al x Ga 1-x-y In y N (0 ≤ x ≤ 1, 0 ≤ y ≤ 1) and disposed on the stress absorbing layer (122); and a compound semiconductor layer (4) having a composition of Al x Ga 1-x-y In y N (0 ≤ x ≤ 1, 0 ≤ y ≤ 1) and disposed on the buffer layer (3).
Claim 7
Dependent Claim
25 words
The semiconductor device of claim 1 (Figs. 1, 3, 5) wherein the Si substrate (1) has a {100} surface orientation or a {111} surface orientation.
Claim 8
Dependent Claim
64 words
The semiconductor device of claim 1 (Fig. 6) wherein the Si substrate (101), the stress absorbing layer (102), and the buffer layer (103) comprise impurities for producing conductivity, and the compound semiconductor layer (105∼107) comprises an impurity for producing conductivity and constitutes a light-to-electricity conversion or an electricity-to-light conversion device structure, and the compositions x and y have values corresponding to the device structure.
Claim 9
Independent Claim
166 words
A method of fabricating a semiconductor device (Figs. 2(a)-2(c), 5) comprising: preparing an Si substrate (1); forming a stress absorbing layer (2, 122) comprising one selected from the groups consisting of GaAs or As and having an amorphous or polycrystalline structure on the Si substrate (1); forming a compound buffer layer (3) having a composition of Al x Ga 1-x-y In y N (0 ≤ x ≤ 1, 0 ≤ y ≤ 1) on the stress absorbing layer (2, 122) at a temperature such that the stress absorbing layer (2, 122) is not decomposed; partly transforming the stress absorbing layer (2, 122) and the buffer layer (3), at least a part of the buffer layer (3), into a monocrystalline structure; and forming a compound semiconductor layer (4) comprising a monocrystalline structure and having a composition of Al x Ga 1-x-y In y N (0 ≤ x ≤ 1, 0 ≤ y ≤ 1) on the buffer layer (3) which is partly transformed into a monocrystalline layer.
Claim 10
Dependent Claim
28 words
The method of claim 9 (Fig. 1) wherein the stress absorbing layer (2) comprises GaAs and is formed at a temperature in a range from 200°C to 600°C.
Claim 11
Dependent Claim
30 words
The method of claim 9 (Fig. 5) wherein the stress absorbing layer (122) comprises As and is formed at a temperature in a range from a room temperature to 550°C.
References Cited (Backward Citations)
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