Patent EP0772156A2 successfully refreshed from Google Patents.
EP0772156A2
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Method and apparatus for rotation of high addressability bitmap images
Assignee: Xerox Corp
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Filing: 1996-10-30
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Granted: —
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Expires: 2016-10-30
Abstract
Abstract Described herein is a method and apparatus for consistently rotating high addressability bitmap images to be rendered on a printing system. A first step encodes the high addressability image to produce a regular bitmap array and then rotates the regular array. A compact dot growth operation is applied to assure that exposure pulses for any gray pixels are consistently positioned to provide a consistent output which is independent of the rotation direction.
Inventors
- 👤 Martin E. Banton
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-09 14:34
CPC Classifications
G; G06; G06T; G06T3/00; G06T3/60; G06T3/606
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
205 words
A method for rotating a high addressability binary bitmap (100), the bitmap (100) including an anamorphic two-dimensional array of input image signals, where a first resolution along a dimension exceeds a second resolution along a second dimension, the method comprising the steps of: encoding the input image signals to produce a bitmap image (108) that is represented by a regular two-dimensional array of multi-bit image signals having a resolution in both dimensions that is equivalent to the second resolution; storing the array of multi-bit image signals in a first memory at the second resolution; rotating the multi-bit image signals stored in the first memory in an increment of about 90° with respect to the orientation of the input image so as to produce a rotated image (114) at the second resolution; storing the image signals of the rotated image in a second memory; generating high addressability binary signals in response to the multi-bit image signals stored in the second memory, wherein each high addressability signal generated in response to a multi-bit image signal has an exposure pulse positioned in response to the states of the multi-bit signal and adjacent multi-bit image signals; and outputting an image representation in response to the generated high addressability signals.
Claim 2
Dependent Claim
40 words
A method according to claim 1, wherein the high addressability binary signals are n-bit signals, consisting essentially of: a 2-bit signal specifying the exposure pulse location; and an (n - 2) bit pulse width signal specifying the exposure pulse duration.
Claim 3
Dependent Claim
106 words
A method according to claim 1 or 2, wherein the encoding step comprises the steps of: temporarily storing, in a latch (152), a plurality of input image signals in response to a clock signal; periodically writing the values of at least two signals stored in the latch (152) to a location in the first memory (154); dividing the clock signal by a factor corresponding to the number of bits in the multi-bit image signals; and uniquely indicating, with an address counter (156) operatively associated with the first memory (154), the address of the location in the first memory (154) in response to the divided clock signal.
Claim 4
Independent Claim
81 words
A method according to any one of claims 1 to 3, wherein the step of generating high addressability binary signals comprises the steps of: retrieving a plurality of neighboring multi-bit image signals from the second memory and comparing the signals against a predefined template pattern to identify a match therebetween, and generating an output code in response to such a match; and using a look-up table responsive to the output code generated by the template matching circuit to generate the output.
Claim 5
Independent Claim
74 words
A method according to any one of claims 1 to 4, wherein the bitmap is at an N×M resolution, where N=P×M and where P is an integer that is greater than 1, and the encoding step produces a second, P-bit per pixel image bitmap at an M×M resolution which is rotated and operated on to identify those P-bit per pixel signals which represent gray pixels therein and to produce a third binary image bitmap.
Claim 6
Dependent Claim
49 words
A method according to claim 5, wherein exposure pulses for the third binary image bitmap are selectively repositioned within a pixel exposure period so that the pulses abut a pulse from an adjacent pixel period and causing a resultant dot for the adjacent pixel period to enlarge when output.
Claim 7
Dependent Claim
91 words
A method according to claim 5, wherein exposure pulses for the third input image bitmap are selectively repositioned within a pixel exposure period by the steps of: retrieving, from the first memory, a plurality of neighboring second image bitmap signals; comparing the plurality of neighboring second image bitmap signals against a predefined template pattern to identify a match therebetween, and generating an output code in response to such a match; and generating, using a look-up table responsive to the output code generated during said comparing step, the third binary image bitmap.
Claim 8
Dependent Claim
228 words
A printing system for rotating a high addressability binary bitmap (100) received for printing, the bitmap (100) including an anamorphic two-dimensional array (100) of input image signals, where a first resolution along a first dimension exceeds a second resolution along a second dimension, the printing system comprising: an encoder (104) for encoding the input image signals to produce a bitmap image (108) that is represented by a regular two-dimensional array of multi-bit image signals having a resolution in both dimensions that is equivalent to the second resolution; a first memory for storing the array of multi-bit image signals at the second resolution; a rotation circuit (110) for rotating the multi-bit image signals stored in said first memory with respect to the orientation of the input image so as to produce a rotated image (114) at the second resolution; a second memory for storing the image signals of the rotated image; a compact dot growth circuit (118), operating on the multi-bit image signals stored in said second memory, for generating output signals, each output signal generated in response to a gray multi-bit image signal having an exposure pulse positioned in response to the states of the multi-bit signal and adjacent multi-bit image signals; and an output engine (126) for outputting an image representation in response to the the high addressability signals generated by said compact dot growth circuit (118).
Claim 9
Dependent Claim
86 words
A printing system according to claim 8, wherein the compact dot growth circuit (118) comprises: a template matching circuit for receiving a plurality of neighboring multi-bit image signals from the second memory and comparing the signals against a predefined template pattern to identify a match therebetween, the template matching circuit generating an output code in response to such a match; and a look-up table, responsive to the output code generated by the template matching circuit, for generating the output signals to drive the output engine (126).
Claim 10
Dependent Claim
25 words
A printing system according to claim 8 or 9, wherein the predefined template pattern represents a region of an image having an edge transition therein.
References Cited (Backward Citations)
US4975977A
Cited
US5359706A
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