Abstract This invention relates to a semiconductor device with embedded capacitor elements of which capacitor insulation layer is made of ferroelectric layer or dielectric layer of high dielectric constant, and its manufacturing method. This invention is made in order to solve the problems of rapid increase of leak current of capacitor element and the poor reliability caused by the large deviation of crystal sizes of conventional capacitor insulation layer of capacitor element incorporated in the semiconductor device. This is accomplished by the invention of a capacitor element consisting of a substrate of semiconductor integrated circuit, a first electrode selectively deposited on the surface of said substrate, a capacitor insulation layer having a high dielectric constant deposited selectively on the surface of said first electrode, and a second electrode deposited on the surface of said capacitor insulation layer avoiding the contact with the first electrode, of which average grain diameters of crystal grains constituting the capacitor insulation layer are within a range of 5 to 20 nm, and the standard deviation of the sizes of crystal grains constituting said capacitor insulation layer is within 3 nm.
A semiconductor device with embedded capacitor elements consisting of a substrate of semiconductor integrated circuit, a first electrode selectively deposited on the surface of said substrate, a capacitor insulation layer having a high dielectric constant deposited selectively on the surface of said first electrode, and a second electrode deposited on the surface of said capacitor insulation layer avoiding the contact with the first electrode, where the average size of crystal grains constituting said capacitor insulation layer is within a range of 5 to 20 nm, and the standard deviation of the sizes of crystal grain constituting said capacitor insulation layer is within 3 nm.
Claim 2
Dependent Claim
115 words
A manufacturing method of said semiconductor device consisting of a process of selective deposition of a first electrode on the surface of said substrate of semiconductor integrated circuit, a process of deposition of dielectric layer having a high dielectric constant on said first electrode, and a process of crystallization of said dielectric layer having a high dielectric constant by increasing the temperature of said dielectric layer having a high dielectric constant in an oxygen atmosphere at a rate of 0.1°C to 10°C/min up to the sintering temperature forming a capacitor insulation layer, and a process of deposition of second electrode on the surface of said capacitor insulation layer avoiding the contact with said first electrode.
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