Wireless unit for a time division multiple access system

Claim 2

The two-frequency band-pass filter according to Claim 1, wherein each of said first and second impedance matching circuit pairs (213, 214) is two phase shifters (213, 214).

Claim 3

The two-frequency band-pass filter according to Claim 1, wherein each of said first and second impedance matching circuit pairs (213, 214) is two transmission lines (83, 84).

Claim 4

The two-frequency band-pass filter according to Claim 1, wherein said first impedance matching circuit pair (213) are two low-pass filters (103) and said second impedance matching circuit pair (214) are two high-pass filters (104).

Claim 5

The two-frequency band-pass filter according to Claim 1, further comprising: a first band-pass portion having at least a pair of conductive layers (212j, 212k) and at least a dielectric material layer (212c, 212d); a shielding electrode layer (121) laminated below said first band-pass portion; and a second band-pass portion laminated below said shielding electrode layer (121) having at least a pair of dielectric material layers (212f, 212g) and at least a conductive layer (212m, 212n); wherein said first band-pass filter (211, 121) and said first impedance matching circuit pair (213, 103, 123) are formed in said first band-pass portion, and said second band-pass filter (212, 122) and said second impedance matching circuit pair (214, 104, 124) are formed in said second band-pass portion.

Claim 6

The two-frequency band-pass filter according to Claim 1, further comprising: a first band-pass portion having at least a pair of conductive layers (213g, 213h) and at least a dielectric material layer (213c); a second band-pass portion having at least a pair of conductive layers (213g, 213h) and at least a dielectric material layer (213c); and a shielding electrode portion; wherein said first and second band-pass portions are disposed adjacent to each other across said shielding electrode portion in such a manner that their side portions oppose each other, said first band-pass filter (211, 131) and said first impedance matching circuit pair (213, 103, 133) are formed in said first band-pass portion, and said second band-pass filter (212, 132) and said second impedance matching circuit pair (214, 104, 134) are formed in said second band-pass portion.

Claim 7

A two-frequency branching filter comprising: a first band-pass filter (71) having a first frequency band; a first impedance matching circuit (73) connected to an input of said first band-pass filter (71) for transforming impedance of said first band-pass filter (71) with respect to a second frequency band to higher impedance, said second frequency band being different from said first frequency band; a second band-pass filter (72) having said second frequency band; a second impedance matching circuit (74) connected to an input of said second band-pass filter (72) for transforming impedance of said second band-pass filter (72) with respect to said first frequency band to higher impedance; a common input terminal (75) connected to an input of said first impedance matching circuit (73) and an input of said second impedance matching circuit (74); a first output terminal (76) connected to an output of said first band-pass filter (71); and a second output terminal (77) connected to an output of said second band-pass filter (72).

Claim 8

The two-frequency branching filter according to Claim 7, wherein each of said first and second impedance matching circuits (73, 74) is a phase shifter (73, 74).

Claim 9

The two-frequency branching filter according to Claim 7, wherein each of said first and second impedance matching circuits (73, 74) is a transmission line (93, 94).

Claim 10

The two-frequency branching filter according to Claim 7, wherein said first impedance matching circuit (73) is a low-pass filter (113) and said second impedance matching circuit (74) is a high-pass filter (114).

Claim 11

The two-frequency branching filter according to Claim 7, further comprising: a first band-pass portion having at least a pair of conductive layers (214j, 214k) and at least a dielectric material layer (214c, 214d); a shielding electrode layer (141) laminated below said first band-pass portion; and a second band-pass portion having laminated below said shielding electrode layer (141) having at least a pair of dielectric material layers (214e, 214f) and at least a conductive layer (214m, 214n); wherein said first band-pass filter (71, 141) and said first impedance matching circuit (73, 113, 143) are formed in said first band-pass portion, and said second band-pass filter (72, 142) and said second impedance matching circuit (74, 114, 144) are formed in said second band-pass portion.

Claim 12

The two-frequency branching filter according to Claim 7, further comprising: a first band-pass portion having at least a pair of conductive layers (215g, 215h) and at least a dielectric material layer (215c); a second band-pass portion having at least a pair of conductive layers (215g, 215h) and at least a dielectric material layer (215c); and a shielding electrode portion; wherein said first band-pass filter (71, 151) and said first impedance matching circuit (73, 113, 153) are formed in said first band-pass portion, said second band-pass filter (72, 152) and said second impedance matching circuit (74, 114, 154) are formed in said second band-pass portion, and said first and second band-pass portions are disposed adjacent to each other across said shielding electrode portion in such a manner that their side portions oppose each other.

Claim 13

A two-frequency combiner comprising: a first band-pass filter having a first frequency band; a first impedance matching circuit connected to an output of said first band-pass filter for transforming impedance of said first band-pass filter with respect to a second frequency band to higher impedance, said second frequency band being different from said first frequency band; a second band-pass filter having said second frequency band; a second impedance matching circuit connected to an output of said second band-pass filter for transforming impedance of said second band-pass filter with respect to said first frequency band to higher impedance; a common output terminal connected to an output of said first impedance matching circuit and an output of said second impedance matching circuit; a first input terminal connected to an input of said first band-pass filter; and a second input terminal connected to an input of said second band-pass filter.

Claim 14

A voltage controlled oscillator with controllable frequency band, comprising: a variable capacity device (305) having a terminal to which input voltage (VT) is applied and another terminal which is grounded, and having capacity which is equivalently changed in accordance with the input voltage (VT); a distributed constant line (307) having a terminal to be AC-connected to said terminal to which said input voltage (VT) is applied; frequency band switching means (315, 308) having a first terminal and a second terminal, said first terminal being connected to another terminal of said distributed constant line (307); and feedback amplifying means further AC-connected to said terminal of said distributed constant line (307) which is AC-connected, and having negative resistance characteristic; wherein said frequency band switching means (315, 308) changes at least the characteristic of said distributed constant line (307) so that a frequency band which is a range in which frequency is varied by said input voltage (VT) is changed to another frequency band.

Claim 15

The voltage controlled oscillator with controllable frequency band according to Claim 14, further comprising a capacitor (309) to be connected between said terminal of said distributed constant line (307) to be AC-connected and the ground.

Claim 16

The voltage controlled oscillator with controllable frequency band according to Claim 14, wherein said second terminal is grounded, and said frequency band switching means (315, 308) is a switch (315) or a switching device (308).

Claim 17

The voltage controlled oscillator with controllable frequency band according to Claim 16, wherein said frequency band switching means (315, 308) causes said distributed constant line (307) to resonate in a 1/4 wavelength resonation mode by short-circuiting between said first terminal and said second terminal when the frequency band switching means (315, 308) is switched on, and said frequency band switching means (315, 308) causes said distributed constant line (307) to resonate in a 1/2 wavelength resonation mode by opening between said first terminal and said second terminal when the frequency band switching means (315, 308) is switched off.

Claim 18

The voltage controlled oscillator with controllable frequency band according to Claim 14, wherein said second terminal is grounded, and said frequency band switching means (315a) comprises another distributed constant line (307b) connected to said second terminal, and a switch connected between said another distributed constant line (307b) and said first terminal.

Claim 19

The voltage controlled oscillator with controllable frequency band according to Claim 14, wherein said second terminal is opened, and said frequency band switching means (315) is a switch (315d) and another distributed constant line (307d), said switch (315d) and said another distributed constant line (307d) having said first terminal, another terminal of said switch (315d) being grounded.

Claim 20

The voltage controlled oscillator with controllable frequency band according to Claim 14, wherein said second terminal is grounded, said frequency band switching means comprises a first switch (315c), a first distributed constant line (307a), a second distributed constant line (307b) connected to said second terminal and a second switch (315a) connected between said first and second distributed constant lines (307a, 315a), said first switch (315c) and said first distributed constant line (307a) having said first terminal, another terminal of said first switch (315c) being grounded.

Claim 21

A two-terminal to multi-common terminal matrix switch comprising: a plurality of common terminals (RFCOM1, RFCOM2); a first short-circuiting switch (QS1) connected between a first terminal (RF1) and the ground for short-circuiting or AC-connecting between the first terminal (RF1) and the ground; a plurality of first connecting switches (QC1, QC2) for connecting between said first terminal (RF1) and each of said plural common terminals (RFCOM1, RFCOM2); a second short-circuiting switch (QS2) connected between a second terminal (RF2) and the ground for short-circuiting or AC-connecting between the second terminal (RF2) and the ground; a plurality of second connecting switches (QC3, QC4) for connecting between said second terminal (RF2) and each of said plural common terminals (RFCOM1, RFCOM2); and control means for conducting at least one between said first terminal (RF1) and each of said plural common terminals (RFCOM1, RFCOM2) by making said first short-circuiting switch (QS1) to be non-conductive, said second short-circuiting switch (QS2) to be conductive and at least one of said first connecting switches (QC1, QC2) to be conducted to said first terminal (RF1) to be conductive, or for conducting at least one between said second terminal (RF2) and each of said plural common terminals (RFCOM1, RFCOM2) by making said first short-circuiting switch (QS1) to be conductive, said second short-circuiting switch (QS2) to be non-conductive and at least one of said second connecting switches (QC3, QC4) to be conducted to said second terminal (RF2) to be conductive.

Claim 22

The two-terminal to multi-common terminal matrix switch according to Claim 21, wherein said first and second short-circuiting switches (QS1, QS2) respectively are first and second short-circuiting transistors (QS1, QS2), and said first and second connecting switches (QC1, QC2, QC3, QC4) respectively are first and second connecting transistors (QC1, QC2, QC3, QC4).

Claim 23

The two-terminal to multi-common terminal matrix switch according to Claim 22, wherein said plural common terminals (RFCOM1, RFCOM2) are first and second common terminals (RFCOM1, RFCOM2), said control means comprises first and second invertors (Inv1, Inv2), and first and second control terminals (Vcont1, Vcont2) to which control signals are supplied; said first invertor (Inv1) is connected to a gate of either of said first short-circuiting transistor (QS1) or said second short-circuiting transistor (QS2), said first control terminal (Vcont1) is connected to said first invertor (Inv1) and a gate of either of said first short-circuiting transistor (QS1) or second short-circuiting transistor (QS2), to which said first invertor (Inv1) is not connected, said second invertor (Inv2) is connected to a gate of either of said first connecting transistor (QC1) or said second connecting transistor (QC3) connected to said first common terminal (RFCOM1) and to a gate of either of said first connecting transistor (QC2) or said second connecting transistor (QC4) connected to said second common terminal (RFCOM2) such that said second invertor (Inv2) is not connected to both of said first and second connecting transistors, and said second control terminal (Vcont2) is connected to said second invertor (Inv2) and a gate of either of said first connecting transistor (QC2) or said second connecting transistor (QC3), to which said second invertor (Inv2) is not connected.

Claim 24

The two-terminal to multi-common terminal matrix switch according to Claim 22 or 23, further comprising a plurality of DC cut capacitors (C1 to C6) connected between the ground and each of said first and second short-circuiting transistors, between said first short-circuiting transistor and said first terminal, between said second short-circuiting transistor and said second terminal and between each of said plural common terminals and each of said plural first and second connecting transistors, wherein said control means further applies reference voltage (Vref) to each source of said first and second short-circuiting transistors and each source of said plural first and second connecting transistors to relatively change control voltage.

Claim 25

A time division multiple access FDD wireless unit comprising: first oscillation means (8) for oscillating a first frequency; first reception signal conversion means (6) for transmitting frequency of difference between a reception signal and an output of said first oscillation means (8); second reception signal conversion means (11) for transmitting frequency of sum or difference between an output of said first reception signal conversion means (6) and a second frequency; modulation means (19) for modulating a third frequency; transmission signal conversion means (22) for transmitting frequency of sum of an output of said modulation means (19) and an output of said first oscillation means (8), wherein the frequency to be transmitted from said transmission signal conversion means (22) is different from frequency of said reception signal, and said second frequency is oscillated by another oscillation means (12) and said third frequency is obtained by multiplying or dividing the second frequency by a predetermined value, or said third frequency is oscillated by another oscillation means (12) and said second frequency is obtained by multiplying or dividing the third frequency by a predetermined value.

Claim 26

The time division multiple access FDD wireless unit according to Claim 25, further comprising: first switching means (7) for switching the output of said first oscillation means (8) to said first reception signal conversion means (6) in case of reception, and for switching the output of said first oscillation means (8) to said transmission signal conversion means (22) in case of transmission, and second switching means for supplying said second frequency to said second reception signal conversion means (11) in case of reception, and for supplying said third frequency to said modulation means (19) in case of transmission.

Claim 27

A time division multiple access FDD wireless unit comprising: first oscillation means (8) for oscillating a first frequency; second oscillation means (12) for oscillating a second frequency; first frequency conversion means (14) for multiplying or dividing said second frequency by n which is an integer not less than 1; second frequency conversion means (18) for multiplying or dividing said second frequency by m which is an integer not less than 1; first reception signal conversion means (6) for transmitting frequency of difference between a reception signal and an output of said first oscillation means (8); second reception signal conversion means (11) for transmitting frequency of sum or difference between an output of said first reception signal conversion means (6) and an output of said first frequency conversion means (14); modulation means (19) for modulating an output of said second frequency conversion means (18); transmission signal conversion means (22) for transmitting frequency of sum of an output of said modulation means (19) and the output of said first oscillation means (8), wherein the frequency to be transmitted from said transmission signal conversion means is different from frequency of said reception signal.

Claim 28

The time division multiple access FDD wireless unit according to Claim 27, wherein assuming that difference between the frequency to be transmitted from said transmission signal conversion means (22) and the frequency of said reception signal is Δf, said second frequency is fL2 and output frequency of said second reception signal conversion means (11) is fR2, in the case where said first frequency conversion means (14) is a n-times multiplier and said second frequency conversion means (18) is a m-times multiplier, relationship between multiplication ratio n and multiplication ratio m satisfies fR2 = |(m - n) fL2 - Δf| or in the case where said first frequency conversion means is a n-divider and said second frequency conversion means is a m-divider, relationship between division ratio n and division ratio m satisfies fR2 = |{1/m) - (1/n)} fL2 - Δf|.

Claim 29

A time division multiple access FDD/TDD dual mode wireless unit comprising: first oscillation means (8b) for oscillating a first frequency; third oscillation means (8a) for oscillating a third frequency; first FDD reception signal conversion means (6b) for transmitting frequency of difference between a reception signal and an output of said first oscillation means (8b); second FDD reception signal conversion means (11b) for transmitting frequency of sum or difference between an output of said first FDD reception signal conversion means (6b) and a second frequency; first TDD reception signal conversion means (6a) for transmitting frequency of difference between said reception signal and an output of said third oscillation means (8a); second TDD reception signal conversion means (11a) for transmitting frequency of sum or difference between an output of said first TDD reception signal conversion means (6a) and a fourth frequency; modulation means (19) for modulating the fourth frequency; selection means (30) for selecting either of the output of said first oscillation means (8b) or the output of said third oscillation means (8a) to be adaptable to an FDD method or a TDD method; transmission signal conversion means (22) for transmitting frequency of sum of the selected output and an output of said modulation means (19); and system switching means (29) for switching said reception signal to said first FDD reception signal conversion means (6b) in case of said FDD method, and for switching said reception signal to said first TDD reception signal conversion means (6a) in case of said TDD method, wherein said second frequency is oscillated by a second oscillation means (12) and said third frequency is obtained by multiplying or dividing the second frequency by a predetermined value, or said fourth frequency is oscillated by a fourth oscillation means (12) and said second frequency is obtained by multiplying or dividing the fourth frequency by a predetermined value.

Claim 30

A time division multiple access FDD/TDD dual mode wireless unit comprising: 2-band frequency synthesizer (8c) for switching and transmitting a first frequency and a third frequency; first FDD reception signal conversion means (6b) for transmitting frequency of difference between a reception signal and said first frequency; second FDD reception signal conversion means (11b) for transmitting frequency of sum or difference between an output of said first FDD reception signal conversion means (6b) and a second frequency; first TDD reception signal conversion means (6a) for transmitting frequency of difference between said reception signal and said third frequency; second TDD reception signal conversion means (11a) for transmitting frequency of sum or difference between an output of said first TDD reception signal conversion means (6a) and a fourth frequency; modulation means (19) for modulating the fourth frequency; selection means for selecting either of said first frequency or said third frequency to be adaptable to an FDD method or a TDD method; transmission signal conversion means (22) for transmitting frequency of sum of the selected output and an output of said modulation means (19); and system switching means (29) for switching said reception signal to said first FDD reception signal conversion means (6b) in case of said FDD method, and for switching said reception signal to said first TDD reception signal conversion means (6a) in case of said TDD method.

Claim 31

A time division multiple access FDD/TDD dual mode wireless unit comprising: first oscillation means (8b) for oscillating a first frequency; second oscillation means (12) for oscillating a second frequency; first frequency conversion means (14) for multiplying or dividing said second frequency by n which is an integer not less than 1; second frequency conversion means (18) for multiplying or dividing said second frequency by m which is an integer not less than 1; third oscillation means (8a) for oscillating a third frequency; first FDD reception signal conversion means (6b) for transmitting frequency of difference between a reception signal and an output of said first oscillation means (8b); second FDD reception signal conversion means (11b) for transmitting frequency of sum or difference between an output of said first FDD reception signal conversion means (6b) and the output of said first frequency conversion means (14); first TDD reception signal conversion means (6a) for transmitting frequency of difference between said reception signal and an output of said third oscillation means (8a); second TDD reception signal conversion means (11a) for transmitting frequency of sum or difference between an output of said first TDD reception signal conversion means (6a) and an output of said second frequency conversion means (18); modulation means (19) for modulating the output of said second frequency conversion means (18); selection means (30) for selecting either of the output of said first oscillation means (8b) or the output of said third oscillation means (8a) to be adaptable to an FDD method or a TDD method; transmission signal conversion means (22) for transmitting frequency of sum of the selected output and an output of said modulation means (19); and system switching means (29) for switching said reception signal to said first FDD reception signal conversion means (6b) in case of said FDD method, and switching said reception signal to said first TDD reception signal conversion means (6a) in case of said TDD method.

Claim 32

The time division multiple access FDD/TDD dual mode wireless unit according to Claim 31, wherein in case of the FDD method, assuming that difference between the frequency transmitted from said transmission signal conversion means (22) and frequency of said reception signal is Δf, said second frequency is fL2 and output frequency of said second FDD reception signal conversion means (11b) is fR2, in the case where said first frequency conversion means (14) is a n-times multiplier and said second frequency conversion means (18) is a m-times multiplier, relationship between multiplication ratio n and multiplication ratio m satisfies fR2 = |(m - n) fL2 - Δf| or in the case where said first frequency conversion means is a n-divider and said second frequency conversion means is a m-divider, relationship between division ratio n and division ratio m satisfies fR2 = |{1/m) - (1/n)} fL2 - Δf|.

Claim 33

The time division multiple access FDD/TDD dual mode wireless unit according to Claim 31 further comprising power amplifying means (24c, 25c) connected to the output of said transmission signal conversion means (22), wherein said power amplifying means (24c, 25c) is mutually used in said FDD system and said TDD system.

Claim 34

The time division multiple access FDD/TDD dual mode wireless unit according to Claim 33 further comprising a 2-band switching low-pass filter (23a, 23b, 26a, 26b) connected to input and/or output of said power amplifying means (24c, 25c), said 2-band switching low-pass filter (23a, 23b, 26a, 26b) having pass band with respect to transmission frequencies of said FDD system and said TDD system.

Claim 35

The time division multiple access FDD/TDD dual mode wireless unit according to any one of Claims 29, 30 and 31, further comprising: synchronous detection means; and frequency switching means for supplying said second frequency to said synchronous detection means in case of reception by said FDD method, and for supplying said fourth frequency to said synchronous detection means in case of reception by said TDD method.

Claim 36

The time division multiple access FDD/TDD dual mode wireless unit according to any one of Claims 29, 30 and 31, further comprising: a plurality of scanning antennas; and diversity switching means for switching said plural scanning antennas.