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EP0730372A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Multi standard video display panel

Assignee: Sony Corp
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Filing: 1996-02-28
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Granted: —
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Expires: 2016-02-28
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Abstract

Abstract A display device that is automatically operable with various types of standards of video signals has a display panel (1), a controller (2), and a timing generator (3). The display panel includes pixels arranged in the form of a matrix to form an image (8). The display panel (1) also contains a built-in vertical scanning circuit (6) that is operable in response to input timing signals and sequentially selects the respective rows of the pixels. Additionally, the display panel contains a built-in horizontal scanning circuit (7) that is operable in response to input timing signals and distributes the various types of standards of the video signals provided from the exterior to the selected rows of the pixels, thereby displaying the image. The controller (2) deciphers the standard of the video signal provided from the exterior and automatically supplies the adjustment information required for optimizing the picture. The timing generator (3) generates the timing signals in accordance with the adjustment information and inputs them into the display panel, whereby the image (8) that has been optimally adjusted based on the standard of the video signal is displayed.

Inventors

  • 👤 Akio Kawamura

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-09 16:50
CPC Classifications
G; G09; G09G; G09G3/00; G09G3/04; G09G3/16; G09G3/18; G09G5/00; G09G5/003; G09G5/006; G09G5/008; G09G5/005; H; H04; H04N; H04N3/00; H04N3/10; H04N3/16; H04N3/27; G09G2340/00; G09G2340/04; G09G2340/0407; G09G2340/0421; G09G2340/0464; G09G2340/0471; G09G2340/0478; G09G2340/0485; H04N5/00; H04N5/44; H04N5/46

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 133 words
A display device comprising: a display panel (1) having pixels (4) arranged in a matrix form to display an image (8), a vertical scanning circuit (6), operable in response to a first timing signal, for sequentially selecting the respective pixel rows, and a horizontal scanning circuit (7), operable in response to a second timing signal, for distributing various standards of video signals provided from an exterior to the selected pixel rows; a controller (2) for deciphering the standard of an incoming video signal and automatically supplying adjustment information required for optimizing the image; and a timing generator (3) for generating the first and second timing signals in accordance with the adjustment information and inputting them into the display panel (1) to display the optimally-adjusted image based on the standard of the video signal.
Claim 2
Dependent Claim 82 words
A display device as claimed in claim 1, wherein said vertical scanning circuit (6) receives a vertical clock signal (VCK) and vertical start signals (VST) as the first timing signal and sequentially transmits the vertical start signals in synchronism with the vertical clock signal to select the respective pixel rows, and wherein said timing generator (3) controls the phase of the vertical start signal (VST) in accordance with the adjustment information to enable automatic adjustments of the vertical center of the image.
Claim 3
Dependent Claim 86 words
A display device as claimed in claim 1, wherein said horizontal scanning circuit (7) receives a horizontal clock signal (HCK) and horizontal start signals (HST) as the second timing signal and sequentially transmits the horizontal start signals (HST) in synchronism with the horizontal clock signal (HCK) to distribute the video signals to the selected pixel rows, and said timing generator (3) controls the phase of the horizontal start signal in accordance with the adjustment information to enable automatic adjustments of the horizontal center of the image.
Claim 4
Dependent Claim 86 words
A display device as claimed in claim 1, wherein said horizontal scanning circuit (7) receives a horizontal clock signal (HCK) and horizontal start signals (HST) as the second timing signal and sequentially transmits the horizontal start signals in synchronism with the horizontal clock signal to distribute the video signals to the selected pixel rows, and wherein said timing generator (3) controls a period of the horizontal clock signal in accordance with the adjustment information to enable automatic adjustments of the circularity or linearity of the image.
Claim 5
Dependent Claim 44 words
A display device as claimed in claim 4, wherein said timing generator (3) comprises a horizontal synchronous PLL circuit (11-14) having a frequency demultiplier (12) for generating the horizontal clock signal (HCK) in synchronism with a horizontal synchronizing signal separated from the video signal.
Claim 6
Dependent Claim 37 words
A display device as claimed in claim 5, wherein a frequency dividing ratio of said frequency demultiplier (12) is varied in accordance with the adjustment information, thereby exerting control over the period of the horizontal clock signal.
Claim 7
Independent Claim 75 words
A method of generating timing signals for a display panel (1) which has a vertical scanning circuit (6) and a horizontal scanning circuit (7), comprising the steps of: receiving adjustment information required for optimizing an image (8) to be displayed in the display panel (1), said adjustment information being produced by deciphering a standard of a video signal; and generating timing signals to be input to said display panel in accordance with the adjustment information.
Claim 8
Dependent Claim 17 words
A method as claimed in claim 7, wherein said adjustment information is transferred via a serial interface.
Claim 9
Dependent Claim 18 words
A method as claimed in claim 8, wherein said adjustment information is subsequently transferred via a parallel interface.

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