Switching circuit

Claim 2

The switching circuit according to claim 1, wherein said inductor (L11) is provided outside said switching integrated circuit (IC).

Claim 3

The switching circuit according to claim 1, wherein a part of or all of input/output terminals (V bias , V ct1 ) inside or outside said switching integrated circuit (IC) are connected to a high-impedance element (R12, R13) for applying a predetermined DC bias to the drain and source terminals of said field-effect transistor/transistors (FET 11).

Claim 4

The switching circuit (11) according to claim 1, wherein said switching integrated circuit (IC) has a part of or all of a control terminal used for switching control of said field-effect transistor/transistors, a bias terminal (V bias , V ct1 ) for applying a predetermined bias to the drain and source terminals of said field-effect transistor/transistors (FET11), and a DC or AC ground terminal.

Claim 5

The switching circuit according to claim 1, wherein said field-effect transistor/transistors (FET11) are constituted by multi-gate field-effect transistor/transistors.

Claim 6

The switching circuit according to claim 1, wherein a plurality of stages of field-effect transistors (FET21, FET22) are connected in series in a portion of said field-effect transistor/transistors.

Claim 7

The switching circuit according to claim 1, wherein said field-effect transistor/transistors (FET11; FET21, FET22) is/are a junction field-effect transistor/transistors.

Claim 8

A switching circuit comprising : a switching integrated circuit (IC) including first, second and third input/output terminals (RF1, RF2, RF3), a first field-effect transistor (FET21) having drain and source terminals connected to said first and second input/output terminals respectively, a second field-effect transistor (FET22) having drain and source terminals connected to said first and third input/output terminals respectively, and first and second high-impedance elements (R21, R22) connected to gate terminals of said first and second field-effect transistors respectively; and first and second inductors (L21, L22) connecting said first and second input/output terminals to each other and said first and third input/output terminals to each other respectively.

Claim 9

The switching circuit according to claim 8, wherein said inductors (L21, L22) are provided outside said switching integrated circuit (IC).

Claim 10

The switching circuit according to claim 8, further comprising : a third inductor (L32) provided outside said switching integrated circuit (IC) and connecting said second and third input/output terminals (RF2, RF3) to each other.

Claim 11

The switching circuit according to claim 8, wherein a part of or all of said input/output terminals (RF1-3) inside or outside said switching integrated circuit (IC) are connected to a high-impedance element (R23, R24, R25) for applying a predetermined DC bias (V bias ) to the drain and source terminals of said field-effect transistor/transistors (FET21, FET22).

Claim 12

The switching circuit according to claim 8, wherein said switching integrated circuit (IC) has a part of or all of a control terminal (V ctl1 , V ctl2 ) used for switching control of said field-effect transistor/transistors (FET21, FET22), a bias terminal (V bias ) for applying a predetermined bias to the drain and source terminals of said field-effect transistor/transistors, and a DC or AC ground terminal.

Claim 13

The switching circuit according to claim 8, wherein said field-effect transistor/transistors (FET21, FET22) are constituted by multi-gate field-effect transistor/transistors.

Claim 14

The switching circuit according to claim 8, wherein a plurality of stages of field-effect transistors are connected in series in a portion of said field-effect transistor/transistors.

Claim 15

The switching circuit according to claim 8, wherein said field-effect transistor/transistors is/are a junction field-effect transistor/transistors.

Claim 16

A switching circuit comprising : a switching integrated circuit (IC) including first, second, third and fourth input/output terminals (RF1-RF4), a first field-effect transistor (FET31) having drain and source terminals connected to said first and second input/output terminals respectively, a second field-effect transistor (FET32) having drain and source terminals connected to said second and third input/output terminals respectively, a third field-effect transistor (FET33) having drain and source terminals connected to said third and fourth input/output terminals respectively, a fourth field-effect transistor (FET34) having drain and source terminals connected to said fourth and first input/output terminals respectively, and first, second, third and fourth high-impedance elements (R31-R34) connected to gate terminals of said first, second, third and fourth field-effect transistors respectively; and first, second, third and fourth inductors (L31-L34) connecting said first and second input/output terminals to each other, said second and third input/output terminals to each other, said third and fourth input/output terminals to each other, and said fourth and first input/output terminals to each other respectively.

Claim 17

The switching circuit according to claim 16, wherein said inductors (L31-L34) are provided outside said switching integrated circuit (IC).

Claim 18

The switching circuit according to claim 16, wherein a part of or all of said input/output terminals (RF1-RF4) are inside or outside said switching integrated circuit (IC) and are connected to a respective high-impedance element (R35-R38) for applying a predetermined DC bias to the drain and source terminals of said field-effect transistor/transistors (FET31-FET34).

Claim 19

The switching circuit according to claim 16, wherein said switching integrated circuit has a part of or all of a control terminal (V ctl1 , V ctl2 ) used for switching control of said field-effect transistor/transistors (FET31-FET32), a bias terminal for applying a predetermined bias to the drain and source terminals of said field-effect transistor/transistors, and a DC or AC ground terminal.

Claim 20

The switching circuit according to claim 16, wherein said field-effect transistor/transistors (FET31-FET34) are constituted by multi-gate field-effect transistor/transistors.

Claim 21

The switching circuit according to claim 16, wherein a plurality of stages of field-effect transistors are connected in series in a portion of said field-effect transistor/transistors.

Claim 22

The switching circuit according to claim 16, wherein said field-effect transistor/transistors is/are a junction field-effect transistor/transistors (FET31-FET34).