EP0720221A1
Expired / Lapsed
EP
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High density trench capacitor DRAM cell
Assignee: International Business Machines Corp
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Filing: 1995-12-06
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Granted: —
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Expires: 2015-12-06
Abstract
Abstract The present invention is a DRAM cell, comprising a transistor having a gate, the gate having an individual segment of gate conductor (17) and a conductive spacer rail wordline (66,67) in contact with the segment gate. The wordline connector is formed by directional etching a conductor formed along a sidewall above the gate segment. The sidewall is formed by etching a groove in a mandrel (60). The structure permits design of a five square folded-bitline DRAM cell.
Inventors
- 👤 P. Noble Wendell, Jr.
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-03 08:32
CPC Classifications
H; H10; H10B; H10B12/00; H10B12/01; H10B12/02; H10B12/03; H10B12/038; H10B12/05; H10B12/30; H10B12/37; Y; Y10; Y10S; Y10S257/00; Y10S257/90
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
49 words
A semiconductor structure, comprising a transistor having a gate, said gate comprising a thin dielectric and an individual segment of gate conductor, said gate conductor being substantially co-extensive with said thin dielectric; and a connector in contact with said segment gate conductor, said connector being a conductive spacer rail.
Claim 2
Dependent Claim
22 words
The semiconductor structure, as recited in claim 1 wherein said connector is a wordline and said semiconductor structure is a DRAM cell.
Claim 3
Dependent Claim
25 words
The semiconductor structure, as recited in claim 1 or 2, wherein said conductive spacer rail has a width equal to less than one minimum dimension.
Claim 4
Dependent Claim
40 words
The DRAM cell, as recited in claim 2, further comprising: a passing wordline that is a conductive spacer rail. a first associated space between said wordline and said passing wordline, said first associated space being less than one minimum dimension.
Claim 5
Dependent Claim
18 words
The DRAM cell, as recited in claim 4, wherein said cell length is less than 4 minimum dimensions.
Claim 6
Dependent Claim
17 words
The DRAM cell, as recited in claim 5, wherein said cell length is about 2.5 minimum dimensions.
Claim 7
Dependent Claim
40 words
The DRAM cell, as recited in claim 4, wherein said cell further comprises: a trench having a capacitor therein; said individual segment of gate conductor adjacent to the trench; and said wordline and said passing wordline extending over said trench.
Claim 8
Dependent Claim
43 words
The DRAM cell, as recited in claim 7, wherein said cell length is less than 4 minimum dimensions, said cell has an area from about 5 to about 8 squares, said gate conductor comprises polysilicon and said wordline comprises a low resistivity material.
Claim 9
Dependent Claim
24 words
The semiconductor structure, as recited in claim 1 or 2, wherein said gate conductor comprises polysilicon and said wordline comprises a low resistivity material.
Claim 10
Dependent Claim
16 words
The DRAM cell, as recited in claim 2, wherein said cell further comprises a trench capacitor.
Claim 11
Dependent Claim
33 words
The DRAM cell, as recited in claim 2, wherein said gate has a length of about one minimum dimension, and wherein said cell has an area from about 5 to about 8 squares.
Claim 12
Dependent Claim
20 words
The DRAM cell, as recited in claim 2, wherein said cell is part of an array having a folded-bitline architecture.
Claim 13
Independent Claim
71 words
A method of making a semiconductor structure, the method comprising the steps of: a) forming a gate of a transistor, said gate comprising a thin dielectric and an individual segment of gate conductor; b) forming a sidewall over said gate conductor; and c) forming a conductive material adjacent said sidewall and in contact with said gate conductor; and d) directional etching said conductive material to form a conductive spacer rail connector.
Claim 14
Dependent Claim
34 words
A method as recited in claim 13, wherein said step (b) comprises the step of forming a mandrel and etching a groove in said mandrel, said groove having a sidewall over said gate conductor.
References Cited (Backward Citations)
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