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EP0720092A1 Expired / Lapsed EP ⏱️ 0.0 years remaining

Microprocessor with debugging system

Assignee: Toshiba Corp
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Filing: 1995-12-21
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Granted: —
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Expires: 2015-12-21
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Abstract

Abstract A system provides debugging functions for high-speed processors by adding a comparatively small amount of hardware to the microprocessor. A debugging module which receives part of the debugging function is placed in a microprocessor and is connected with a debugging tool outside the processor. In the debugging module, a processor core in the processor accesses and executes a monitor program in the debugging tool 60 through the debugging module. In the normal mode, while the processor executes a user program, the debugging module receives trace information and sends it to the debugging tool and also performs tasks related to the breakpoints.

Inventors

  • 👤 Tatsuo Yano
  • 👤 Takashi Miyamori

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-08 05:36
CPC Classifications
G; G06; G06F; G06F11/00; G06F11/36; G06F11/362; G06F11/3648; G06F11/3656; G06F11/3636

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 57 words
In a debugging system for debugging an application program for a microprocessor, a microprocessor comprising: first logic means for running a monitor program on a monitor memory in a debugging tool located outside said microprocessor; second logic means for controlling execution of a user program containing hardware breakpoints; and third logic means for tracing said user program.
Claim 2
Independent Claim 210 words
A method for transferring signals between a microprocessor and a debugging tool, said debugging tool comprising a monitor memory for storing a monitor program to be executed in debugging mode, and further including an input terminal, an output terminal and a memory access control circuit, said method operative during both a memory read cycle and a memory write cycle, said method comprising the steps of: during a memory read cycle: receiving via said input terminal, an address in serial format from said microprocessor; converting said address in serial format into parallel format through use of said memory access control circuit; reading addressed data from said monitor memory in a parallel format and converting said addressed data into a series format by means of said memory access control circuit; outputting said data in said serial format from said output terminal toward said microprocessor; and during a memory write cycle: inputting via said input terminal, address and data output by said microprocessor in serial format; converting said address and data in said serial format into parallel format by means of said memory access control circuit; writing said data to said address in said monitor memory; and issuing a signal indicating completion of said writing into said monitor memory from said output terminal.
Claim 3
Dependent Claim 110 words
A trace method for handling signals between a microprocessor and a debugging tool, comprising the steps of: storing an execution status of an instruction in said microprocessor into a trace memory in said debugging tool; in case said instruction is a jump or branch instruction, further storing into said trace memory, a target address of said jump or branch instruction; in case an exception has occurred, further storing into said trace memory, an exception vector number of said exception; and wherein all of said execution status, said address and said exception vector number are transmitted through a signal pin dedicated to signal transmissions between said microprocessor and said debugging tool.
Claim 4
Dependent Claim 96 words
A tracing method for handling signals between a microprocessor and a debugging tool, comprising the steps of: in case the microprocessor has: a. executed an instruction at a preset address, b. accessed data at a preset address, c. written preset data at a preset address, or d. read preset data from a preset address, sensing occurrence of any events a-d via a signal pin dedicated to signal transmissions between said microprocessor and said debugging tool; and deciding the timing of a start or stop of storing trace information into a trace memory of said debugging tool.

References Cited (Backward Citations)

EP0271910A2 Cited
GB2200482A Cited
EP0313848A2 Cited

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