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Non-volatile memory and method for manufacturing the same

Assignee: Sharp Corp
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Filing: 1995-05-02
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Granted: —
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Expires: 2015-05-02
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Abstract

Abstract A flash memory which comprises: a semiconductor substrate of a first conductive type, a source and drain impurity diffusion regions of a second conductive type, a channel region formed between the source and drain impurity diffusion regions, a gate insulating film formed on the channel region, a floating gate electrode formed on the gate insulating film, and a control gate electrode formed at least partially overlapped with the floating gate electrode through the intermediary of an insulating interlayer film, in which the source and drain impurity diffusion regions are formed with a constant distance in a main surface of the semiconductor substrate and at least a part of the either region is formed in a surface having a crystal face orientation different from the main surface of the substrate; the channel region is in contact with the drain impurity diffusion region and has an inclined region of which surface has a crystal face orientation different from the main surface of the semiconductor substrate; and the source impurity diffusion region is placed relatively upper than the drain impurity diffusion region.

Inventors

  • 👤 Tadashi Matsushita

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-05 23:41
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/0411; H10D30/60; H10D30/68; H10D30/681; H10D30/684; H10D30/685; H10D30/6891

Claims Analysis

Total Claims: 11
Claim 1
Independent Claim 183 words
A non-volatile memory which comprises: a semiconductor substrate of a first conductive type, a source and drain impurity diffusion regions of a second conductive type, a channel region formed between the source and drain impurity diffusion regions, a gate insulating film formed on the channel region, a floating gate electrode formed on the gate insulating film, and a control gate electrode formed at least partially overlapped with the floating gate electrode through the intermediary of an insulating interlayer film, in which the source and drain impurity diffusion regions are formed with a constant distance in a main surface of a surface layer of the semiconductor substrate and at least a part of the either region is formed in a surface having a crystal face orientation different from the main surface of the substrate; the channel region is in contact with the drain impurity diffusion region and has an inclined region of which surface has a crystal face orientation different from the main surface of the semiconductor substrate; and the source impurity diffusion region is placed relatively upper than the drain impurity diffusion region.
Claim 2
Dependent Claim 26 words
A non-volatile memory according to Claim 1, in which the source impurity diffusion region has a junction dielectric strength higher than the drain impurity diffusion region.
Claim 3
Dependent Claim 39 words
A non-volatile memory according to Claim 1 comprising a plurality of memories, in which two adjacent memories commonly use the drain impurity diffusion region and are positioned in a mirror image with respect to the drain impurity diffusion region.
Claim 4
Dependent Claim 28 words
A non-volatile memory according to claim 1, in which the control gate electrode is at least partially capacitively coupled on the side wall of the floating gate electrode.
Claim 5
Dependent Claim 152 words
A thin film transistor which comprises: a semiconductor substrate of a first or a second conductive type, a first insulating film formed on the substrate, a semiconductor thin film formed on the first insulating film, a source and drain impurity diffusion regions of a first or a second conductive type, a channel region formed between the source and drain impurity diffusion regions, a gate insulating film formed on the channel region, a floating gate electrode formed on the gate insulating film, a control gate electrode formed at least partially overlapped with the floating gate electrode through the intermediary of an insulating interlayer film, in which the source and drain impurity diffusion regions are formed with a constant distance in a main surface of the semiconductor thin film; the channel region has an inclined part; and the source impurity diffusion region is placed relatively upper or lower than the drain impurity diffusion region.
Claim 6
Independent Claim 208 words
A method for forming a non-volatile memory comprising the steps of: forming a device isolation oxide film in a predetermined region on a main surface of a semiconductor substrate having a first conductive type, forming a low concentration impurity diffusion region having a second conductive type in a region at least where the Fowler-Nordheim tunnel occurs in an active region, forming a gate insulating film in the active region in which the low concentration impurity diffusion region is formed, forming a floating gate electrode sandwiched by the low concentration impurity diffusion region and a control gate electrode and the area of the floating gate electrode being defined such that the capacity between the low concentration impurity diffusion region and the floating gate electrode and the capacity between the floating gate electrode and the control gate electrode are desirably adjusted, forming an interlayer film on the floating gate electrode, forming the control gate electrode patterned such that at least a part of the floating electrode is overlapped with the floating gate electrode, forming a source region and a drain region by implanting impurities having the second conductive type at a high concentration in the active region using the control gate electrode and the floating gate electrode as a mask.
Claim 7
Dependent Claim 100 words
A method for forming a non-volatile memory according to claim 6, comprising the steps of: forming the device isolation oxide film by oxidation treatment over both the device isolation region and a part of the active region removing the device isolation oxide film on the active region, thereby generating hot electrons in the contacting part of the region where the crystal structure has been disturbed by edge-stress generated in the substrate by the oxidation treatment and of the end part of the drain diffusion region facing the channel region, and then injecting the hot electrons into the floating gate electrode.
Claim 8
Independent Claim 231 words
A method for forming a non-volatile memory comprising the steps of: forming a device isolation oxide film in a predetermined region on a main surface of a semiconductor substrate having a first conductive type, forming an opening in the device isolation oxide film by etching a predetermined region of the device isolation oxide film using a film used for preventing formation of an insulating film at the time of forming the device isolation oxide film and a photoresist as a mask, removing the photoresist and the film used for preventing formation of an oxide film, forming a second insulating film having a different etching ratio from the device isolation oxide film, exposing a part of the semiconductor substrate which forms an active region by removing a thin region of the device isolation oxide film, forming a gate insulating film on an exposed region, forming a floating gate electrode material on the gate insulating film, forming a flat film on the whole surface such that the surface is flattened at least on the active region, etching such that the flat film remains on the inclined region and the floating gate electrode material and the surface of the floating gate electrode material other than the inclined region is exposed, forming a floating gate electrode by etching the floating gate electrode material using the flat film remaining on the inclined region as a mask.
Claim 9
Independent Claim 101 words
A method for forming a non-volatile memory comprising the steps of: covering at least a part of the first electrode with an insulating film, forming a first interlayer film on the surface other than the region covered by the insulating film, removing the insulating film, forming on the region where the insulating film has been removed a second interlayer film which is thinner than the first interlayer film, forming a second electrode above the first electrode through the intermediary of the first and second interlayer films lying so that the second electrode at least covers all of the second interlayer film.
Claim 10
Dependent Claim 145 words
A non-volatile memory which comprises: a semiconductor substrate of a first conductive type, a source and drain impurity diffusion regions of a second conductive type formed in said substrate, a channel region formed between the source and drain impurity diffusion regions, a gate insulating film formed on the channel region, a floating gate electrode formed on the gate insulating film, and a control gate electrode formed at least partially overlapped with the floating gate electrode through the intermediary of an insulating interlayer film, in which at least a part of one of said impurity diffusion regions is formed in a surface having a crystal face orientation different from the main surface of the substrate; the channel region has an inclined surface with a crystal face orientation different from the main surface of the semiconductor substrate; and the impurity diffusion regions are disposed at different levels.
Claim 11
Dependent Claim 45 words
A non-volatile memory device in which one of the impurity diffusion regions providing source and drain regions in a semiconductor substrate forms, along with the adjacent part of the channel region between such impurity regions, an inclined surface beneath a floating and control gate structure.

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