Patent EP0706215A2 successfully refreshed from Google Patents.
EP0706215A2
Expired / Lapsed
EP
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Improvements in or relating to semiconductor devices and their manufacture
Assignee: Texas Instruments Inc
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Filing: 1995-09-14
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Granted: —
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Expires: 2015-09-14
Abstract
Abstract This is a device and method of optimizing capacitance and performance for multilevel interconnects. The device comprising: a semiconductor layer 70; a first high-k layer 68 above the semiconductor layer; a first insulating layer 66 above the first high-k layer 68; an interconnect layer 58 above the first insulating layer 66; a second insulating layer 64 around the interconnect layer 58; and a second high-k layer 52 above the second insulating layer 64 and the interconnect layer 58. The device may have a low-k material inserted between closely spaced metal interconnects. Alternatively, the device may have air gaps between closely spaced metal interconnects. In addition, the first high-k layer may be used as an oxide etch stop.
Inventors
- 👤 Shin-Puu Jeng
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-29 19:40
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/40; H10W20/45; H10W20/48; H10W20/495
Claims Analysis
Total Claims: 21
Claim 1
Independent Claim
45 words
A method of forming semiconductor devices comprising: forming a first high-k layer on a semiconductor layer; forming a first insulating layer on said first high-k layer; forming an interconnect layer on said first insulating layer; and forming a second insulating layer over said interconnect layer.
Claim 2
Dependent Claim
24 words
The method of Claim 1, wherein said method further includes forming a second high-k layer above said second insulating layer and said interconnect layer.
Claim 3
Dependent Claim
20 words
The method of Claim 1 or Claim 2, wherein said forming the or each high-k layer utilizes plasma deposition techniques.
Claim 4
Dependent Claim
20 words
The method of Claim 1 or Claim 2, wherein said forming the or each high-k layer utilizes sputter deposition techniques.
Claim 5
Independent Claim
15 words
The method of any preceding claim, further comprising forming said insulating layer of low-k material.
Claim 6
Independent Claim
31 words
The method of any preceding claim, wherein said step of forming said interconnect layer includes patterning and etching said interconnect layer and wherein said etching stops at said first high-k layer.
Claim 7
Independent Claim
29 words
The method of any of Claims 1 to 5, wherein said forming said interconnect layer includes forming a metal barrier layer, a metal interconnect layer and metal cap layer.
Claim 8
Independent Claim
23 words
The method of claims 1 to 5, wherein said step of forming said interconnect layer comprises forming the layer by damascene metal deposition.
Claim 9
Independent Claim
16 words
The method of any preceding claim, further comprising forming said insulating layer by chemical vapor deposition.
Claim 10
Independent Claim
19 words
The method of any preceding claims, wherein said method further includes inserting low-k material between closely spaced metal interconnects.
Claim 11
Independent Claim
22 words
The method of any of Claims 1 to 9, wherein said method further includes forming air gaps between closely spaced metal interconnects.
Claim 12
Independent Claim
53 words
A method of operating a multilevel semiconductor device, wherein said semiconductor device includes a permanent ground plane and at least two levels of interconnects, said method comprising: creating a voltage difference between said at least two levels of interconnects while one of said at least two levels of interconnects is transmitting a signal.
Claim 13
Dependent Claim
30 words
The method of Claim 12, wherein said method further includes grounding a second level while a first level of said at least two levels of interconnects is transmitting said signal.
Claim 14
Dependent Claim
28 words
The method of Claim 13, wherein said method further includes grounding a portion of said second level directly above a portion of said first level transmitting said signal.
Claim 15
Independent Claim
41 words
The method of any of Claims 12 to 14, wherein said method further includes applying less than 50% of said signal to a second level while a first level of said at least two levels of interconnects is transmitting said signal.
Claim 16
Dependent Claim
44 words
A interconnect structure in a semiconductor device comprising: a semiconductor layer; a first high-k layer above said semiconductor layer; a first insulating layer above said first high-k layer; an interconnect layer above said first insulating layer; a second insulating layer around said interconnect layer.
Claim 17
Dependent Claim
20 words
The structure of Claim 16, further comprising a second high-k layer above said second insulating layer and said interconnect layer.
Claim 18
Dependent Claim
27 words
The device of Claim 16 or Claim 17, wherein said interconnect layer is comprised of a metal barrier layer, a metal layer and a metal cap layer.
Claim 19
Independent Claim
17 words
The device of any of Claims 16 to 18, wherein said interconnect layer is comprised of aluminum.
Claim 20
Independent Claim
19 words
The device of any of Claims 16 to 19, wherein said first insulating layer is comprised of silicon dioxide.
Claim 21
Independent Claim
20 words
The device of any of Claims 16 to 20, wherein said second insulating layer is comprised of a low-k material.
References Cited (Backward Citations)
No citation records indexed.
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