Patent US6535105B2 successfully refreshed from Google Patents.
Patent EP0704899A2 successfully refreshed from Google Patents.
EP0704899A2
Expired / Lapsed
EP
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Method of manufacturing chip-size package-type semiconductor device
Assignee: NEC Electronics Corp
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Filing: 1995-09-29
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Granted: —
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Expires: 2015-09-29
Abstract
Abstract In a method of manufacturing a semiconductor device comprising a semiconductor chip and a carrier film which includes an insulating film and wiring patterns formed on one of main surfaces of the insulating film, an adhesive layer is formed on a surface of a semiconductor wafer having a number of integrated circuits. Each of the integrated circuits has electrode pads for external connection on the foregoing surface of the semiconductor wafer. Subsequently, openings are formed at regions of the adhesive layer corresponding to the electrode pads, and then, the semiconductor wafer is cut per integrated circuit so as to obtain the semiconductor chips. Thereafter, the electrode pads of the semiconductor chip and the wiring patterns of the carrier film are connected to each other through the corresponding openings of the adhesive layer, respectively. Then, the semiconductor chip and the carrier film are bonded together via the adhesive layer interposed therebetween. It may be arranged that the adhesive layer is formed on the carrier film rather than on the semiconductor chip.
Inventors
- 👤 Keiichiro Kata
- 👤 Shuichi Matsuda
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-09 11:05
CPC Classifications
H; H10; H10W; H10W74/00; H10W74/01; H10W74/012; H10W72/00; H10W72/071; H10W70/00; H10W70/40; H10W70/453; H10W74/10; H10W74/111; H10W74/129; H10W74/131; H10W74/137; H10W74/15; H10W70/60; H10W72/01; H10W72/012; H10W72/01251; H10W72/01255; H10W72/013; H10W72/01331; H10W72/072; H10W72/073; H10W72/20; H10W72/241; H10W72/251; H10W72/252; H10W72/29; H10W72/30; H10W72/851; H10W72/853; H10W72/856; H10W72/90; H10W72/951; H10W72/952; H10W90/00; H10W90/701; H10W90/721; H10W90/724; H10W90/731; H10W90/734
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
144 words
A method of manufacturing a semiconductor device comprising a semiconductor chip and a carrier film, said carrier film including an insulating film and wiring patterns formed on one of main surfaces of said insulating film, characterized by the steps of: forming an adhesive layer on a surface of a semiconductor wafer having a number of integrated circuits, said integrated circuits each having electrode pads for external connection on said surface of the semiconductor wafer; forming a first group of openings at regions of said adhesive layer corresponding to said electrode pads; cutting said semiconductor wafer per said integrated circuit so as to obtain said semiconductor chip; connecting between said electrode pads of said semiconductor chip and said wiring patterns of said carrier film through said first group of openings, respectively; and bonding said semiconductor chip and said carrier film together via said adhesive layer.
Claim 2
Independent Claim
138 words
A method of manufacturing a semiconductor device comprising a semiconductor chip with electrode pads on a surface thereof and a carrier film, said carrier film including an insulating film and wiring patterns formed on one of main surfaces of said insulating film, characterized by the steps of: forming an adhesive layer over all the area of said surface of the semiconductor chip or on a region of said carrier film corresponding to said all the area of the surface of the semiconductor chip; forming a first group of openings at regions of said adhesive layer corresponding to said electrode pads; connecting between said electrode pads of said semiconductor chip and said wiring patterns of said carrier film through said first group of openings, respectively; and bonding said semiconductor chip and said carrier film together via said adhesive layer.
Claim 3
Dependent Claim
23 words
A method as claimed in Claim 1 or Claim 2, wherein said first group of openings are formed by etching or laser processing.
Claim 4
Dependent Claim
62 words
A method as claimed in Claim 1 or Claim 2, further including the step, after the step of forming said first group of openings, of providing a metal projection or a metal ball bump at each of said first group of openings for electrical connection, said metal projection or said metal ball bump projecting from each of said first group of openings.
Claim 5
Dependent Claim
19 words
A method as claimed in claim 4, wherein said metal ball bump is formed of Au added with Pd.
Claim 6
Dependent Claim
51 words
Amethod as claimed in Claim 1 or Claim 2, wherein said insulating film is provided with through holes for forming conductive passages each for connection between said wiring patterns and said electrode pads or wirings of an external board, said through holes being formed by Ar laser processing and washing processing.
Claim 7
Dependent Claim
150 words
A method as claimed in Claim 1 or Claim 2, wherein said carrier film is provided with said wiring patterns on a surface opposite to another main surface which confronts said semiconductor chip, said wiring patterns being coated with a cover coating formed of an insulating material, said cover coating being formed with second group of openings for connecting said wiring patterns to wirings of an external board, said second group of openings being provided with ball bumps, respectively, each of said ball bumps being formed by punching out a solder piece of an essentially T-shape in section from solder of a plate shape using a punching jig having a projection at its tip, temporarily jointing said T-shaped solder piece to each of said wiring patterns in each of said second group of openings, and then heating said T-shaped solder piece so as to be formed into a ball shape.
Claim 8
Dependent Claim
31 words
A method as claimed in Claim 1 or Claim 2, wherein a mark for directional matching is formed at a center portion of said carrier film by using said wiring patterns.
Claim 9
Dependent Claim
67 words
A method as claimed in Claim 1 or Claim 2, further including the step, after the step of bonding said semiconductor chip and said carrier film together via said adhesive layer, of coating at least a joint region between said semiconductor chip and said carrier film at a lateral side of a bonded unit of said semiconductor chip and said carrier film with a fluororesin coating material.
References Cited (Backward Citations)
No citation records indexed.
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