Patent EP0677822A2 successfully refreshed from Google Patents.
EP0677822A2
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Digital image rotation
Assignee: International Business Machines Corp
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Filing: 1995-03-09
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Granted: —
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Expires: 2015-03-09
Abstract
Abstract A method is provided for rotating bi-level image data by plus or minus 90°. An 8 x 8 pixel block is selected for rotation from the image data and, using lookup tables, an intermediate matrix is generated dynamically and stored into two 32-bit registers in the processor. Generation of the intermediate matrix partially rotates and stores the odd-numbered rows from the block of data in the first 32-bit register and the even-numbered rows from the block in the second 32-bit register. The first and second registers are copied, respectively, into third and fourth 32-bit registers. The first and second registers are then shifted one bit in opposite directions. The first register is logical ORed with the fourth register, and the second register is logical ORed with the third register so that the even bits are replaced in one register and the odd bits in the other. These steps are repeated for all remaining blocks of image data.
Inventors
- 👤 Albert Z. Zhao
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-09 17:12
CPC Classifications
G; G06; G06T; G06T3/00; G06T3/60; G06T3/602
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
168 words
A method of rotating by 90° a block of bi-level image data having 8 rows by 8 columns of pixel data bits in a computer system supporting a 32-bit operating system, comprising the steps of: generating an intermediate matrix having 8 rows by 8 columns of pixel data bits, wherein each row from the block is divided and translated into a paired nibble column, alternate rows from the block being arranged transversely and lower order rows from the block being arranged on top of higher order rows in the paired nibble columns of the intermediate matrix; saving the rows of the intermediate matrix sequentially into first and second 32-bit processor registers; copying the first 32-bit register into a third 32-bit processor register and the second 32-bit register into a fourth 32-bit processor register; shifting each of the first and second registers by one bit in opposite directions; and overlaying alternate bits from the fourth register onto the first register and from the third register onto the second register.
Claim 2
Dependent Claim
47 words
The method according to claim 1, wherein the step of generating an intermediate matrix comprises generating an intermediate matrix wherein the alternate rows are arranged transversely from right to left, and wherein higher order bits from each divided row are arranged on top of lower order bits.
Claim 3
Dependent Claim
42 words
The method according to claim 2, wherein the step of shifting each of the first and second registers by one bit in opposite directions comprises shifting the first register by one bit right and shifting the second register by one bit left.
Claim 4
Dependent Claim
58 words
The method according to claim 3, wherein the step of overlaying alternate bits further comprises the steps of zeroing out all the even bits of the first and fourth registers and all odd bits of the second and third registers, and logical ORing the first register with the fourth register and the second register with the third register.
Claim 5
Dependent Claim
47 words
The method according to claim 1, wherein the step of generating an intermediate matrix comprises generating an intermediate matrix wherein the alternate rows are arranged transversely from left to right, and wherein lower order bits from each divided row are arranged on top of higher order bits.
Claim 6
Dependent Claim
42 words
The method according to claim 5, wherein the step of shifting each of the first and second registers by one bit in opposite directions comprises shifting the first register by one bit left and shifting the second register by one bit right.
Claim 7
Dependent Claim
57 words
The method according to claim 6, wherein the step of overlaying alternate bits further comprises the steps of zeroing out all odd bits of the first and fourth registers and all even bits of the second and third registers, and logical ORing the first register with the fourth register and the second register with the third register.
Claim 8
Independent Claim
86 words
The method according to any preceding claim, wherein the step of generating an intermediate matrix comprises: obtaining a first set of 4-byte values from at least one lookup table for each odd-numbered row from the block and dynamically overlaying said first set of 4-byte values in the first 32-bit register; and obtaining a second set of 4-byte values from said at least one lookup table for each even-numbered row from the block and dynamically overlaying said second set of 4-byte values in the second 32-bit register.
Claim 9
Independent Claim
68 words
A method of rotating by 90° a bi-level image in a computer system supporting a 32-bit operating system, comprising the steps of: selecting an unrotated block of data from the image having 8 rows by 8 columns of pixels; rotating the selected block of image data according to the method of any preceding claim; and repeating the above for each 8 by 8 pixel block in the image.
Claim 10
Dependent Claim
181 words
Apparatus for rotating by 90° a block of bi-level image data having 8 rows by 8 columns of pixel data bits in a computer system supporting a 32-bit operating system, comprising: means for generating an intermediate matrix having 8 rows by 8 columns of pixel data bits from the block, wherein each row from the block is divided and translated into a paired nibble column, alternate rows from the block being arranged transversely and lower order rows from the block being arranged on top of higher order rows in the paired nibble columns of the intermediate matrix; at least first, second, third, and fourth 32-bit processor registers, the first and third registers for saving, in duplicate, the first four rows of the intermediate matrix and the second and fourth registers for saving, in duplicate, the remaining four rows of the intermediate matrix; means for shifting each of the first and second registers by one bit in opposite directions; and means for overlaying alternate bits from the fourth register onto the first register and from the third register onto the second register.
Claim 11
Dependent Claim
19 words
Apparatus according to claim 10, wherein the means for generating an intermediate matrix comprises at least one lookup table.
Claim 12
Dependent Claim
34 words
Apparatus according to claim 11, wherein said at least one lookup table comprises multiple look tables, each lookup table being adapted for generating a 4-byte value for at least one row from the block.
Claim 13
Dependent Claim
52 words
Apparatus according to claim 12, wherein the means for generating an intermediate matrix comprises: four lookup tables, each lookup table being adapted for generating 4-byte values for at least two rows from the block; and means for dynamically overlaying 4-byte values from alternate rows from the block into one of said registers.
References Cited (Backward Citations)
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