Patent US6667446B1 successfully refreshed from Google Patents.
Patent EP0669738A2 successfully refreshed from Google Patents.
← Back to Patent Explorer
EP0669738A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

System and method for automatically detecting speed, parity, and character length

Assignee: International Business Machines Corp
•
Filing: 1994-12-06
•
Granted: —
•
Expires: 2014-12-06
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A new system and method allows for the transmission speed, parity setting and character length setting of a remote device in an asynchronous network to be detected automatically. The system of the present invention comprises an oversampling counter for counting the duration of line transitions of a received data stream, means for storing the interval counts, means, based upon the detected line transitions, for determining the system baud rate, for determining whether the received data stream has even parity, odd parity, mark parity or space parity and for determining the character length of the protocol used. Using the system and method of the present invention, a data stream conforming to predetermined rules must be used, i.e., two characters of a set of characters must be transmitted initially so that the system can detect the speed, parity and character length of the remote device so that the remainder of the system may configure itself accordingly.

Inventors

  • 👤 Frank P. Hart
  • 👤 Theodore Brian Vojnovich

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-09 14:49
CPC Classifications
H; H04; H04L; H04L25/00; H04L25/02; H04L25/0262

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 183 words
A system for automatically detecting baud rate, parity and character length of an asynchronous data bit stream wherein bits of opposite value are separated by a line transition, said data stream comprising a first and a second character, each character having a START and a STOP indicator, one of said first or second characters having a single bit transition (two successive line transitions separated by a single bit), said first character having a different parity bit than said second character where parity is enforced, said system comprising: a line transition detector; a counter for counting the duration of time between each successive line transition; a memory having a plurality of memory locations; means for storing each count in a corresponding memory location; means for inspecting the contents of said memory locations; means for determining the baud rate based upon the duration of time of said single bit transition; means for reconstructing said two characters from said data bit stream; and means for determining the parity and the character length of the received data bit stream based upon said contents of said memory locations.
Claim 2
Dependent Claim 29 words
The system defined in claim 1 wherein said parity and character length determining means determines parity and character length based upon said contents of at least two memory locations.
Claim 3
Dependent Claim 21 words
The system defined in claim 1 or 2 wherein said memory comprises a plurality of registers corresponding to said memory locations.
Claim 4
Dependent Claim 55 words
The system defined in claim 3 wherein said parity and character length determining means determines parity and character length based upon a first register for storing the count immediately preceding said STOP indicator of said first character and upon a second register for storing the count immediately preceding said STOP indicator of said second character.
Claim 5
Dependent Claim 25 words
The system defined in claim 4 wherein one of said first or second registers comprises a parity bit of the corresponding first or second characters.
Claim 6
Independent Claim 24 words
The system defined in any one of claims 1 to 5 wherein said character reconstructing means reconstructs said characters based upon said baud rate.
Claim 7
Independent Claim 235 words
A method for automatically detecting transmission rate, parity and character length of a stream of data having a first character and a second character, said characters being represented by binary digits comprising positive and negative going transitions and each having a START indicator and a STOP indicator, at least one of said characters having a positive and a negative going transition separated by a duration one binary digit in length, and said first character having a different parity bit from said second character when parity is odd or even, said method comprising the steps of: a) detecting a first of said transitions; b) detecting another of said transitions following said first transition; c) counting the duration of time between said first transition and said following transition; d) storing the count in a register; e) detecting a next transition; f) counting the duration of time between the previous transition and said next transition; g) storing the count in another register; h) repeating steps (e), (f), and (g) until said STOP indicator of said second character has been reached; i) inspecting the contents of each register; j) determining the lowest non-zero count value of said registers; k) determining the baud rate based on said lowest non-zero count value; l) reconstructing said first and second characters based upon said baud rate; and m) using a look-up table for determining character length and parity based upon the count values.
Claim 8
Dependent Claim 117 words
An asynchronous network having a first transmitting device and a second receiving device, said second receiving device having a system according to any one of claims 1 to 6 for automatically detecting baud rate, parity and character length of an asynchronous data bit stream transmitted by said first transmitting device wherein bits of opposite value are separated by a line transition, said data stream comprising a first and a second character, each character having a START and a STOP indicator, one of said first or second characters having a single bit transition (two successive line transitions separated by a single bit), said first character having a different parity bit than said second character where parity is enforced.
Claim 9
Dependent Claim 90 words
A data bit stream transmitting device for use in the asynchronous network according to claim 8 comprises means for generating and transmitting a data bit stream comprising a first and a second character of a predefined character length and parity, each character having a START and a STOP indicator, one of said first or second characters having a single bit transition (two successive line transitions separated by a single bit), and said first character having a different parity bit than said second character where parity is either odd or even.

References Cited (Backward Citations)

No citation records indexed.

USPTO Annuity & Maintenance Windows

Maintenance schedule is calculated for granted US utility patents.

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag