Buck converter with operating mode automatically determined by the load level

Claim 2

A converter as defined in claim 1, wherein said preset thresholds of the level of load are implemented without using sensing resistances of the output current by establishing a reference duty-cycle that is comparable with the current duty-cycle.

Claim 3

A converter as defined in claim 2, wherein said reference duty-cycle has a value comprised between 30% and 80% of a steady state duty-cycle of the converter in a continuous mode of operation under control of said first control loop.

Claim 4

A DC-to-DC static converter comprising a power section that includes at least a switch capable of switching at a frequency set by a clock signal, a storing capacitor, a recirculation diode and a control and output voltage stabilization section which comprises at least a first control loop that includes an error amplifier and a PWM control comparator capable of controlling the duty-cycle of said switch in function of the output voltage and characterized by comprising a driving circuit of said switch comprising a logic AND gate, receiving through a first input a first logic signal output by said PWM control comparator and having an output connected to a set input of a first latch circuit having a reset terminal to which said clock signal is applied, the output signal of the latch circuit controlling the state of said switch; a first logic circuit capable of generating a second logic signal representative of a reference duty-cycle; a second logic circuit capable of comparing said second logic signal and a first logic signal representative of the current duty-cycle of the converter and generating a third, logic set signal for a second mode latch, the output signal of which enables or disables said error amplifier and said PWM comparator when the current duty-cycle drops below said reference duty-cycle; a hysteresis comparator, enabled by said error amplifier and PWM comparator disabling signal, capable of generating a fourth logic signal for turning on and turning off said switch, which is applied to a second input of said AND gate, in function of the dropping of the output voltage of the converter below a first preset minimum reference threshold or of the rising of the output voltage of the converter above a second preset maximum reference threshold; a third logic circuit capable of determining the duty-cycle of said fourth signal produced by said threshold comparator and generating a fifth logic signal for resetting said second mode latch when the duty-cycle of said fourth logic signal is above a preset threshold thus enabling said error amplifier and said PWM comparator and disabling said comparator.

Claim 5

A converter as defined in claim 4, wherein said first logic signal generates a signal representative of a reference constant duty-cycle, which varies with the varying of the supply voltage.

Claim 6

A converter as defined in claim 4, wherein said second logic circuit has means for producing a certain hysteresis in the change of state of said third logic signal that sets said second mode latch.